// SetupIfrOptionValue - decompiled from Platform.efi
__int64 __fastcall SetupIfrOptionValue(unsigned __int64 n12, _QWORD *a2, unsigned __int64 *a3)
{
  int v6; // eax
  unsigned __int64 n12_1; // rax
  unsigned __int64 v9; // rcx
  char v10; // bl
  __int64 v11; // rax
  __int64 v12; // rcx

  v6 = UnicodeStrToUpper(n12) - 1; /*0xa935*/
  if ( v6 ) /*0xa938*/
  {
    if ( v6 != 1 ) /*0xa93d*/
    {
LABEL_6:
      DebugPrint(0x80000000, "GetPchPcieRpDevFun invalid RpNumber %x", n12); /*0xa950*/
      Assert( /*0xa977*/
        (__int64)"e:\\hs\\PurleySktPkg\\SouthClusterLbg\\Library\\PeiDxeSmmPchPcieRpLib\\PchPcieRpLib.c",
        91,
        (__int64)"((BOOLEAN)(0==1))");
      return 0x8000000000000002uLL; /*0xa986*/
    }
    n12_1 = 12; /*0xa93f*/
  }
  else
  {
    n12_1 = 20; /*0xa946*/
  }
  if ( n12 >= n12_1 ) /*0xa94e*/
    goto LABEL_6; /*0xa94e*/
  v9 = 3 * (n12 >> 2); /*0xa996*/
  v10 = n12 - byte_EFF0[v9 + 2]; /*0xa99f*/
  v11 = byte_EFF0[v9]; /*0xa9a2*/
  v12 = byte_EFF0[v9 + 1] | 0xFD00LL; /*0xa9ab*/
  *a2 = v11; /*0xa9b2*/
  *a3 = ((unsigned __int64)*(unsigned int *)(v12 << 16) >> (4 * v10)) & 7; /*0xa9c6*/
  return 0; /*0xa9d5*/
}
