/** @file
  OpromUpdateDxeNeonCityEPECB.h -- Header for OpromUpdateDxeNeonCityEPECB

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __OPROMUPDATEDXENEONCITYEPECB_H__
#define __OPROMUPDATEDXENEONCITYEPECB_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
ReadUnaligned64(
  VOID
);

EFI_STATUS
EFIAPI
CompareGuidQword(
  VOID
);

EFI_STATUS
EFIAPI
UbaDebugPrint(
  VOID
);

EFI_STATUS
EFIAPI
UbaAssert(
  VOID
);

EFI_STATUS
EFIAPI
IsPcieSlotNumberValid(
  VOID
);

EFI_STATUS
EFIAPI
GetDefaultSlotConfig(
  VOID
);

EFI_STATUS
EFIAPI
GetNeonCitySlotConfig(
  VOID
);

EFI_STATUS
EFIAPI
GetPcieSlotNumberTable(
  VOID
);

EFI_STATUS
EFIAPI
SetPcieSlotNumber(
  VOID
);

EFI_STATUS
EFIAPI
OpromUpdateEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
UEFI table pointers (initialized at entry point)(
  VOID
);

EFI_STATUS
EFIAPI
gImageHandle       = NULL;(
  VOID
);

EFI_STATUS
EFIAPI
UBA protocol interface pointer (for debug print and assert)(
  VOID
);

EFI_STATUS
EFIAPI
VOID  *mUbaProtocol = NULL;(
  VOID
);

EFI_STATUS
EFIAPI
HOB list pointer(
  VOID
);

EFI_STATUS
EFIAPI
VOID  *mHobList = NULL;(
  VOID
);

EFI_STATUS
EFIAPI
definitions (located in .data section at runtime)(
  VOID
);

EFI_STATUS
EFIAPI
CONST EFI_GUID  mDxeServicesProtocolGuid =(
  VOID
);

EFI_STATUS
EFIAPI
(Option ROM Policy) Table(
  VOID
);

EFI_STATUS
EFIAPI
entries, each spanning 3 bytes across a 4-byte stride.(
  VOID
);

EFI_STATUS
EFIAPI
table encodes the PCI bus:device:function range for each of the 8 slots.(
  VOID
);

EFI_STATUS
EFIAPI
are at offsets 0xEF1, 0xEF5, 0xEF9, 0xEFD, 0xF01, 0xF05, 0xF09, 0xF0D.(
  VOID
);

EFI_STATUS
EFIAPI
runtime the data is populated by the platform initialization code.(
  VOID
);

EFI_STATUS
EFIAPI
layout per entry (bytes v4-1, v4, v4+1):(
  VOID
);

EFI_STATUS
EFIAPI
key: ((Bus << 8) | (Device << 16) | (Function << 24)) & 0xFFFFFF00(
  VOID
);

EFI_STATUS
EFIAPI
UINT8  mOprmTable[OPRM_TABLE_ENTRY_COUNT * OPRM_TABLE_STRIDE];(
  VOID
);

EFI_STATUS
EFIAPI
slot configuration table (all 0xFFFF = empty)(
  VOID
);

EFI_STATUS
EFIAPI
UINT8  mDefaultSlotConfig[64] = { 0 };(
  VOID
);

EFI_STATUS
EFIAPI
EP EC B slot configuration table(
  VOID
);

EFI_STATUS
EFIAPI
entries matching the .rdata structure at 0xD40(
  VOID
);

EFI_STATUS
EFIAPI
number table (10 entries for NeonCity EP EC B)(
  VOID
);

EFI_STATUS
EFIAPI
Device ID(
  VOID
);

EFI_STATUS
EFIAPI
Vendor ID(
  VOID
);

EFI_STATUS
EFIAPI
Slot Capabilities register value(
  VOID
);

EFI_STATUS
EFIAPI
at 0xE40 - platform-specific PCIe BDF slot mappings(
  VOID
);

EFI_STATUS
EFIAPI
entries define the PCIe slot numbering for the platform(
  VOID
);

EFI_STATUS
EFIAPI
system configuration table for EFI_HOB_LIST_GUID entry(
  VOID
);

EFI_STATUS
EFIAPI
(gSystemTable->NumberOfTableEntries > 0) {(
  VOID
);

EFI_STATUS
EFIAPI
list not found - trigger assertion (matching original behavior)(
  VOID
);

EFI_STATUS
EFIAPI
((
  VOID
);

EFI_STATUS
EFIAPI
HOB size via DXE Services GetBootMode (function at vtable+24 = index 3)(
  VOID
);

EFI_STATUS
EFIAPI
= gBootServices->CalculateE820CompatibleSize (31);(
  VOID
);

EFI_STATUS
EFIAPI
UBA protocol via DXE Services Table(
  VOID
);

EFI_STATUS
EFIAPI
= gBootServices->LocateProtocol ((
  VOID
);

EFI_STATUS
EFIAPI
platform type from CMOS/RTC register(
  VOID
);

EFI_STATUS
EFIAPI
= IoRead8 (RTC_ADDRESS_PORT);(
  VOID
);

EFI_STATUS
EFIAPI
platform type(
  VOID
);

EFI_STATUS
EFIAPI
(PlatformType > PLATFORM_TYPE_MAX) {(
  VOID
);

EFI_STATUS
EFIAPI
= (MmioRead32 (PLATFORM_TYPE_MMIO_REG) & 0x2) | 0x1;(
  VOID
);

EFI_STATUS
EFIAPI
filter level based on platform type(
  VOID
);

EFI_STATUS
EFIAPI
= UBA_DEBUG_ERROR;(
  VOID
);

EFI_STATUS
EFIAPI
UBA debug print function if severity matches filter(
  VOID
);

EFI_STATUS
EFIAPI
print function is at vtable offset 1 (index 1, offset 8)(
  VOID
);

EFI_STATUS
EFIAPI
((FilterLevel & ErrorLevel) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
function is at vtable offset 2 (index 2, offset 16)(
  VOID
);

EFI_STATUS
EFIAPI
= (EFI_STATUS (EFIAPI *)(CONST CHAR8 *, UINTN, CONST CHAR8 *))(
  VOID
);

EFI_STATUS
EFIAPI
for v4-1 offset(
  VOID
);

EFI_STATUS
EFIAPI
OPRM entry is 3 bytes at 4-byte stride(
  VOID
);

EFI_STATUS
EFIAPI
points to entry base = mOprmTable + (PortIndex * 4)(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT8 *)(UINTN)mOprmTable + (PortIndex * 4);(
  VOID
);

EFI_STATUS
EFIAPI
BDF from 3 bytes at offset v4-1, v4, v4+1(
  VOID
);

EFI_STATUS
EFIAPI
into a slot key: ((byte[-1] << 8) | (byte[0] << 16) | (byte[1] << 24)) & 0xFFFFFF00(
  VOID
);

EFI_STATUS
EFIAPI
= OprmEntry[-1];(
  VOID
);

EFI_STATUS
EFIAPI
the BDF slot key: ((Bus) | (Device << 8) | (Function << 16)) << 8(
  VOID
);

EFI_STATUS
EFIAPI
OR with 0x19 (Slot Capabilities Register low byte offset) and 0x1A (high byte)(
  VOID
);

EFI_STATUS
EFIAPI
= (Bus | (Device << 8) | (Function << 16)) << 8;(
  VOID
);

EFI_STATUS
EFIAPI
DXE Services Protocol(
  VOID
);

EFI_STATUS
EFIAPI
slot range low byte via DXE Services function at vtable+56 (index 7)(
  VOID
);

EFI_STATUS
EFIAPI
| 0x19 = PCIe Slot Capabilities register low byte(
  VOID
);

EFI_STATUS
EFIAPI
= ((EFI_DXE_SERVICES *)DxeServices)->GetFunctionTableEntry ((
  VOID
);

EFI_STATUS
EFIAPI
slot range high byte via DXE Services function at vtable+56 (index 7)(
  VOID
);

EFI_STATUS
EFIAPI
| 0x1A = PCIe Slot Capabilities register high byte(
  VOID
);

EFI_STATUS
EFIAPI
if PciAddress falls within this slot's valid range(
  VOID
);

EFI_STATUS
EFIAPI
(PciAddress >= SlotRangeLow && PciAddress <= SlotRangeHigh) {(
  VOID
);

EFI_STATUS
EFIAPI
configuration data structure (48 bytes total)(
  VOID
);

EFI_STATUS
EFIAPI
GUID + version + callback function pointers(
  VOID
);

EFI_STATUS
EFIAPI
struct {(
  VOID
);

EFI_STATUS
EFIAPI
config GUID (16 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
data version(
  VOID
);

EFI_STATUS
EFIAPI
padding(
  VOID
);

EFI_STATUS
EFIAPI
function pointers (the "PSET" table at 0xEC0 in .data)(
  VOID
);

EFI_STATUS
EFIAPI
0: GetDefaultSlotConfig(
  VOID
);

EFI_STATUS
EFIAPI
1: GetNeonCitySlotConfig(
  VOID
);

EFI_STATUS
EFIAPI
2: GetPcieSlotNumberTable(
  VOID
);

EFI_STATUS
EFIAPI
3: SetPcieSlotNumber(
  VOID
);

EFI_STATUS
EFIAPI
4,5: Reserved (set to 0)(
  VOID
);

EFI_STATUS
EFIAPI
Callbacks[6];         // 6 * 8 = 48 bytes(
  VOID
);

EFI_STATUS
EFIAPI
global UEFI table pointers to match UEFI standard library behavior(
  VOID
);

EFI_STATUS
EFIAPI
= ImageHandle;(
  VOID
);

EFI_STATUS
EFIAPI
HOB list (cached for later use)(
  VOID
);

EFI_STATUS
EFIAPI
(ImageHandle);(
  VOID
);

EFI_STATUS
EFIAPI
driver entry(
  VOID
);

EFI_STATUS
EFIAPI
the UBA OpromUpdate config protocol(
  VOID
);

EFI_STATUS
EFIAPI
configuration data structure(
  VOID
);

EFI_STATUS
EFIAPI
(&ConfigData.ConfigGuid, &mUbaProtocolGuid, sizeof (EFI_GUID));(
  VOID
);

EFI_STATUS
EFIAPI
configuration with UBA framework(
  VOID
);

EFI_STATUS
EFIAPI
function at vtable index 2 (offset 16) in UbaConfigProtocol(
  VOID
);

EFI_STATUS
EFIAPI
((EFI_STATUS (EFIAPI *)(VOID *, VOID *, VOID *, UINTN))UbaConfigProtocol)((
  VOID
);

#endif /* __OPROMUPDATEDXENEONCITYEPECB_H__ */