# OpromUpdateDxeCLX64L

**Index**: 0054 | **Size**: 4192 bytes | **Arch**: x64 | **Phase**: DXE

## Overview

Option ROM Update Policy driver for the Cascade Lake (CLX64L) platform. Configures PCIe slot number mapping and bus scan limits. Provides 8 PCIe slot mapping entries (root port to logical slot) and 6 bus scan limit entries for specific devices (Intel I350, X550, Mellanox).

## Key Functions

- **UefiMain** — Entry point; caches UEFI globals, locates UBA protocol, registers OpROM config data with slot map and bus scan limits
- **SetPcieSlotNumber / GetPcieSlotNumber** — Maps PCIe Root Port (bus/device/function) to logical slot number using bitmask position
- **GetBusScanLimit / GetBusScanLimit2** — Returns bus scan depth limits for specific NIC devices (I350 bus 4, X550 bus 8, Mellanox bus 8)
- **GetUbaProtocol** — Locates the UBA OpROM update protocol via BootServices
- **GetHobList** — Scans system configuration table for the HOB list pointer

## Protocols / Dependencies

- UBA OpROM update protocol
- PCI Root Bridge I/O protocol
- ACPI Support protocol
- UBA Debug protocol

## Platform

CLX64L (Cascade Lake Xeon 64L / Purley platform variant)