| Address | Name | Description | |
|---|---|---|---|
| ReadUnaligned64 | |||
| CompareGuidQword | |||
| UbaDebugPrint | |||
| UbaAssert | |||
| IsPcieSlotNumberValid | |||
| GetDefaultSlotConfig | |||
| GetNeonCitySlotConfig | |||
| GetPcieSlotNumberTable | |||
| SetPcieSlotNumber | |||
| OpromUpdateEntryPoint | |||
| Global | UEFI table pointers (initialized at entry point) | ||
| EFI_HANDLE | gImageHandle = NULL; | ||
| Cached | UBA protocol interface pointer (for debug print and assert) | ||
| STATIC | VOID *mUbaProtocol = NULL; | ||
| Cached | HOB list pointer | ||
| STATIC | VOID *mHobList = NULL; | ||
| GUID | definitions (located in .data section at runtime) | ||
| STATIC | CONST EFI_GUID mDxeServicesProtocolGuid = | ||
| OPRM | (Option ROM Policy) Table | ||
| 8 | entries, each spanning 3 bytes across a 4-byte stride. | ||
| The | table encodes the PCI bus:device:function range for each of the 8 slots. | ||
| Entries | are at offsets 0xEF1, 0xEF5, 0xEF9, 0xEFD, 0xF01, 0xF05, 0xF09, 0xF0D. | ||
| At | runtime the data is populated by the platform initialization code. | ||
| Byte | layout per entry (bytes v4-1, v4, v4+1): | ||
| Combined | **key: ((Bus << 8) | (Device << 16) | (Function << 24)) & 0xFFFFFF00** |
| STATIC | UINT8 mOprmTable[OPRM_TABLE_ENTRY_COUNT * OPRM_TABLE_STRIDE]; | ||
| Default | slot configuration table (all 0xFFFF = empty) | ||
| STATIC | UINT8 mDefaultSlotConfig[64] = { 0 }; | ||
| NeonCity | EP EC B slot configuration table | ||
| Placeholder | entries matching the .rdata structure at 0xD40 | ||
| PciBdfSlot | number table (10 entries for NeonCity EP EC B) | ||
| PCI | Device ID | ||
| PCI | Vendor ID | ||
| PCIe | Slot Capabilities register value | ||
| Data | at 0xE40 - platform-specific PCIe BDF slot mappings | ||
| These | entries define the PCIe slot numbering for the platform | ||
| Scan | system configuration table for EFI_HOB_LIST_GUID entry | ||
| if | (gSystemTable->NumberOfTableEntries > 0) { | ||
| HOB | list not found - trigger assertion (matching original behavior) | ||
| UbaDebugPrint | ( | ||
| Get | HOB size via DXE Services GetBootMode (function at vtable+24 = index 3) | ||
| HobSize | = gBootServices->CalculateE820CompatibleSize (31); | ||
| Locate | UBA protocol via DXE Services Table | ||
| Status | = gBootServices->LocateProtocol ( | ||
| Detect | platform type from CMOS/RTC register | ||
| RtcReg | = IoRead8 (RTC_ADDRESS_PORT); | ||
| Validate | platform type | ||
| if | (PlatformType > PLATFORM_TYPE_MAX) { | ||
| PlatformType | **= (MmioRead32 (PLATFORM_TYPE_MMIO_REG) & 0x2) | 0x1;** | |
| Set | filter level based on platform type | ||
| FilterLevel | = UBA_DEBUG_ERROR; | ||
| Call | UBA debug print function if severity matches filter | ||
| Debug | print function is at vtable offset 1 (index 1, offset 8) | ||
| if | ((FilterLevel & ErrorLevel) != 0) { | ||
| Assert | function is at vtable offset 2 (index 2, offset 16) | ||
| AssertFunc | = (EFI_STATUS (EFIAPI )(CONST CHAR8 , UINTN, CONST CHAR8 *)) | ||
| Adjust | for v4-1 offset | ||
| Each | OPRM entry is 3 bytes at 4-byte stride | ||
| OprmEntry | points to entry base = mOprmTable + (PortIndex * 4) | ||
| OprmEntry | = (UINT8 )(UINTN)mOprmTable + (PortIndex 4); | ||
| Decode | BDF from 3 bytes at offset v4-1, v4, v4+1 | ||
| Combined | **into a slot key: ((byte[-1] << 8) | (byte[0] << 16) | (byte[1] << 24)) & 0xFFFFFF00** |
| Bus | = OprmEntry[-1]; | ||
| Build | **the BDF slot key: ((Bus) | (Device << 8) | (Function << 16)) << 8** |
| Then | OR with 0x19 (Slot Capabilities Register low byte offset) and 0x1A (high byte) | ||
| BdfSlotKey | **= (Bus | (Device << 8) | (Function << 16)) << 8;** |
| Locate | DXE Services Protocol | ||
| Read | slot range low byte via DXE Services function at vtable+56 (index 7) | ||
| BdfSlotKey | ** | 0x19 = PCIe Slot Capabilities register low byte** | |
| Status | = ((EFI_DXE_SERVICES *)DxeServices)->GetFunctionTableEntry ( | ||
| Read | slot range high byte via DXE Services function at vtable+56 (index 7) | ||
| BdfSlotKey | ** | 0x1A = PCIe Slot Capabilities register high byte** | |
| Check | if PciAddress falls within this slot's valid range | ||
| if | (PciAddress >= SlotRangeLow && PciAddress <= SlotRangeHigh) { | ||
| UBA | configuration data structure (48 bytes total) | ||
| Contains | GUID + version + callback function pointers | ||
| typedef | struct { | ||
| Platform | config GUID (16 bytes) | ||
| Configuration | data version | ||
| Alignment | padding | ||
| Callback | function pointers (the "PSET" table at 0xEC0 in .data) | ||
| Index | 0: GetDefaultSlotConfig | ||
| Index | 1: GetNeonCitySlotConfig | ||
| Index | 2: GetPcieSlotNumberTable | ||
| Index | 3: SetPcieSlotNumber | ||
| Index | 4,5: Reserved (set to 0) | ||
| UINT64 | Callbacks[6]; // 6 * 8 = 48 bytes | ||
| Initialize | global UEFI table pointers to match UEFI standard library behavior | ||
| gImageHandle | = ImageHandle; | ||
| Initialize | HOB list (cached for later use) | ||
| GetHobList | (ImageHandle); | ||
| Log | driver entry | ||
| Locate | the UBA OpromUpdate config protocol | ||
| Build | configuration data structure | ||
| CopyMem | (&ConfigData.ConfigGuid, &mUbaProtocolGuid, sizeof (EFI_GUID)); | ||
| Register | configuration with UBA framework | ||
| Call | function at vtable index 2 (offset 16) in UbaConfigProtocol | ||
| return | ((EFI_STATUS (EFIAPI )(VOID , VOID , VOID , UINTN))UbaConfigProtocol)( |
Generated by HR650X BIOS Decompilation Project