/** @file
  PchSerialGpio.h -- Header for PchSerialGpio

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __PCHSERIALGPIO_H__
#define __PCHSERIALGPIO_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
GpioGetMioBase(
  VOID
);

EFI_STATUS
EFIAPI
GpioReadReg(
  VOID
);

EFI_STATUS
EFIAPI
GpioWriteReg(
  VOID
);

EFI_STATUS
EFIAPI
GpioPollSgpioReady(
  VOID
);

EFI_STATUS
EFIAPI
GpioIsPadValid(
  VOID
);

EFI_STATUS
EFIAPI
GpioValidateGroup(
  VOID
);

EFI_STATUS
EFIAPI
GpioValidatePin(
  VOID
);

EFI_STATUS
EFIAPI
RegisterSerialGpio(
  VOID
);

EFI_STATUS
EFIAPI
SetSerialGpioAltFunc(
  VOID
);

EFI_STATUS
EFIAPI
GpioWriteSgpioWord(
  VOID
);

EFI_STATUS
EFIAPI
GpioWriteSgpioPartialWord(
  VOID
);

EFI_STATUS
EFIAPI
UnregisterSerialGpio(
  VOID
);

EFI_STATUS
EFIAPI
GpioGetPadConfig(
  VOID
);

EFI_STATUS
EFIAPI
GpioPackDw1Value(
  VOID
);

EFI_STATUS
EFIAPI
GpioSetPadConfig(
  VOID
);

EFI_STATUS
EFIAPI
GpioUnpackDw0Value(
  VOID
);

EFI_STATUS
EFIAPI
GpioSetPadBlinkMode(
  VOID
);

EFI_STATUS
EFIAPI
GpioSetPadGpiMode(
  VOID
);

EFI_STATUS
EFIAPI
GpioCheckPadOwnership(
  VOID
);

EFI_STATUS
EFIAPI
GpioGetDw0RegAddress(
  VOID
);

EFI_STATUS
EFIAPI
GpioIsSgpioBusy(
  VOID
);

EFI_STATUS
EFIAPI
GpioGetPchStepping(
  VOID
);

EFI_STATUS
EFIAPI
PchSerialGpioEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
ModuleEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
//(
  VOID
);

EFI_STATUS
EFIAPI
EFI_SYSTEM_TABLE       *gSystemTable    = NULL;   // 0x2E38(
  VOID
);

EFI_STATUS
EFIAPI
EFI_RUNTIME_SERVICES    *gRuntimeServices = NULL;  // 0x2E50(
  VOID
);

EFI_STATUS
EFIAPI
VOID                    *gmMciUsra        = NULL;  // 0x2E68(
  VOID
);

EFI_STATUS
EFIAPI
VOID                    *gPcd             = NULL;  // 0x2E80(
  VOID
);

EFI_STATUS
EFIAPI
UINT32                  gPchStepping      = 3;       // 0x2E30 (PCH_SSTEPPING_UNKNOWN = 3)(
  VOID
);

EFI_STATUS
EFIAPI
Group Information Table (GpioGroupnfo[])(
  VOID
);

EFI_STATUS
EFIAPI
entries, 60 ytes each, at 0x2B20(
  VOID
);

EFI_STATUS
EFIAPI
fll struct layout, see GGIO_GROUP_INFO in PPchSerialGpio.h(
  VOID
);

EFI_STATUS
EFIAPI
GPI_O_GROUP_INFO *mGpioGroupTable = (GPIO_GROUP_INFO*)0x2B20;(
  VOID
);

EFI_STATUS
EFIAPI
of groups(
  VOID
);

EFI_STATUS
EFIAPI
MMIO register offsets used by ths driver(
  VOID
);

EFI_STATUS
EFIAPI
- Pad confg DW DW0 register(
  VOID
);

EFI_STATUS
EFIAPI
- Pad DW0 mas register(
  VOID
);

EFI_STATUS
EFIAPI
- Pad DW0 value register(
  VOID
);

EFI_STATUS
EFIAPI
return (GpioPad & 0xFF000000) == 0x01000000;(
  VOID
);

EFI_STATUS
EFIAPI
return (GpioPad & 0xFF000000) == 0x02000000;(
  VOID
);

EFI_STATUS
EFIAPI
call - detect PCH stepping(
  VOID
);

EFI_STATUS
EFIAPI
config B0:D31:F0, offset 2(
  VOID
);

EFI_STATUS
EFIAPI
DeviceId in 0x5E40-0x5E7F range -> LBB(
  VOID
);

EFI_STATUS
EFIAPI
DeiceId in SLBG range(
  VOID
);

EFI_STATUS
EFIAPI
protocol signature (CR macro - offset -40 bytes from(
  VOID
);

EFI_STATUS
EFIAPI
functon pointer passed as 'This'(
  VOID
);

EFI_STATUS
EFIAPI
if a pin is alrady registered(
  VOID
);

EFI_STATUS
EFIAPI
anyway (nofatal)(
  VOID
);

EFI_STATUS
EFIAPI
GPIO group based on PCH stepping(
  VOID
);

EFI_STATUS
EFIAPI
= 515 (0x203) for SBBG, 259 (0x103) for LBG(
  VOID
);

EFI_STATUS
EFIAPI
current DW0_REG and DW0_MAK registers(
  VOID
);

EFI_STATUS
EFIAPI
full GpioPad from function, group, pin(
  VOID
);

EFI_STATUS
EFIAPI
current pad config (DW0 and DW1)(
  VOID
);

EFI_STATUS
EFIAPI
pad configuration to protocol(
  VOID
);

EFI_STATUS
EFIAPI
register values(
  VOID
);

EFI_STATUS
EFIAPI
bit masks: set bit in Dw0Reg, clear bit in Dw0Mask(
  VOID
);

EFI_STATUS
EFIAPI
pad config to serial mode(
  VOID
);

EFI_STATUS
EFIAPI
pin ownership(
  VOID
);

EFI_STATUS
EFIAPI
updated registers(
  VOID
);

EFI_STATUS
EFIAPI
pad config(
  VOID
);

EFI_STATUS
EFIAPI
the pin as registered(
  VOID
);

EFI_STATUS
EFIAPI
protocol signature(
  VOID
);

EFI_STATUS
EFIAPI
parameters(
  VOID
);

EFI_STATUS
EFIAPI
GPIO group based on stepping(
  VOID
);

EFI_STATUS
EFIAPI
current DW0_CFG register(
  VOID
);

EFI_STATUS
EFIAPI
teh alt function index (bits [21:16])(
  VOID
);

EFI_STATUS
EFIAPI
the alt function index(
  VOID
);

EFI_STATUS
EFIAPI
ownership again(
  VOID
);

EFI_STATUS
EFIAPI
data: full 32-bit words(
  VOID
);

EFI_STATUS
EFIAPI
remainder bytes (1-3 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
for SGPIO ready(
  VOID
);

EFI_STATUS
EFIAPI
configured alt function index (mux) with mode field(
  VOID
);

EFI_STATUS
EFIAPI
3(
  VOID
);

EFI_STATUS
EFIAPI
data to DW0_CF(
  VOID
);

EFI_STATUS
EFIAPI
the interface (set bit 0)(
  VOID
);

EFI_STATUS
EFIAPI
for completion(
  VOID
);

EFI_STATUS
EFIAPI
mux with mode 0 (no mode bits)(
  VOID
);

EFI_STATUS
EFIAPI
0(
  VOID
);

EFI_STATUS
EFIAPI
data(
  VOID
);

EFI_STATUS
EFIAPI
GpioWriteReg ((UINT8)GpioGroup, GPIO_REG_DW0_CFG, DwCfg | 1);(
  VOID
);

EFI_STATUS
EFIAPI
typomatch header(
  VOID
);

EFI_STATUS
EFIAPI
saved values(
  VOID
);

EFI_STATUS
EFIAPI
DW0 registers(
  VOID
);

EFI_STATUS
EFIAPI
as unregistered(
  VOID
);

EFI_STATUS
EFIAPI
GpioPad(
  VOID
);

EFI_STATUS
EFIAPI
host ownership(
  VOID
);

EFI_STATUS
EFIAPI
number out of range - return base config only(
  VOID
);

EFI_STATUS
EFIAPI
pad config register (DW0 and DW1)(
  VOID
);

EFI_STATUS
EFIAPI
pad mode offset(
  VOID
);

EFI_STATUS
EFIAPI
DW0 value (complex bit reaangement for internal use)(
  VOID
);

EFI_STATUS
EFIAPI
encodes the pad configuration into a compact formrmt(
  VOID
);

EFI_STATUS
EFIAPI
DW1 register(
  VOID
);

EFI_STATUS
EFIAPI
DW register base for pad mode(
  VOID
);

EFI_STATUS
EFIAPI
register contains pad-level mode bits(
  VOID
);

EFI_STATUS
EFIAPI
pad mode group ownership(
  VOID
);

EFI_STATUS
EFIAPI
blink register(
  VOID
);

EFI_STATUS
EFIAPI
GPI register(
  VOID
);

EFI_STATUS
EFIAPI
bit packing from the original decompilation:(
  VOID
);

EFI_STATUS
EFIAPI
= ((Dw0Reg & 0x300(
  VOID
);

EFI_STATUS
EFIAPI
|= (Dw0Reg & 0x10000000 | 0x9000000) >> 24;(
  VOID
);

EFI_STATUS
EFIAPI
|= 2 * ((DW_REG_BASE[Pin] >> Pin) & 1);(
  VOID
);

EFI_STATUS
EFIAPI
|= 4 * ((PAD_MODE_GROUP[Pin] >> Pin) & 1) | 1;(
  VOID
);

EFI_STATUS
EFIAPI
- actual packing is bit-exact from decomp(
  VOID
);

EFI_STATUS
EFIAPI
pin is within range(
  VOID
);

EFI_STATUS
EFIAPI
if pad is locked(
  VOID
);

EFI_STATUS
EFIAPI
DW0 value from packed representation and write it(
  VOID
);

EFI_STATUS
EFIAPI
pad config register address(
  VOID
);

EFI_STATUS
EFIAPI
DW0 register(
  VOID
);

EFI_STATUS
EFIAPI
unpacking from packed format:(
  VOID
);

EFI_STATUS
EFIAPI
reverses the packing done in GpioGetPadConfig(
  VOID
);

EFI_STATUS
EFIAPI
to hardware(
  VOID
);

EFI_STATUS
EFIAPI
pad mode register if needed(
  VOID
);

EFI_STATUS
EFIAPI
pad mode based on bits from packed value(
  VOID
);

EFI_STATUS
EFIAPI
GPIO output register if needed(
  VOID
);

EFI_STATUS
EFIAPI
blink mode (mode 4) if Dw1 bits [1:0] == 3(
  VOID
);

EFI_STATUS
EFIAPI
GPI mode (mode 5) if Dw1 bits [2:0] == 5(
  VOID
);

EFI_STATUS
EFIAPI
revers the complex bit rearrangement from GpioGetPadConfig.(
  VOID
);

EFI_STATUS
EFIAPI
original decompilation shows a 2-way packing with shifts and masks.(
  VOID
);

EFI_STATUS
EFIAPI
the serial GPIO use case, the mask PAD_CFG_MASK_SERIAL_MODE (0xFFFFF830)(
  VOID
);

EFI_STATUS
EFIAPI
value PAD_CFG_SERIAL_REG_VALUE (0x00000141) are applied directly.(
  VOID
);

EFI_STATUS
EFIAPI
serial GPIO, the GPIO group is determined by stepping.(
  VOID
);

EFI_STATUS
EFIAPI
check reads the DW0_CF register and waits for bit 8 to clear.(
  VOID
);

EFI_STATUS
EFIAPI
the timeout occurs, it returns EFI_DVICE_ERROR.(
  VOID
);

EFI_STATUS
EFIAPI
funtion is not used directly in this driver;(
  VOID
);

EFI_STATUS
EFIAPI
MMIO addressing is done inline.(
  VOID
);

EFI_STATUS
EFIAPI
initialized on first call in GpioGetGroupTable(
  VOID
);

EFI_STATUS
EFIAPI
B0:D31:F0, offset 2(
  VOID
);

EFI_STATUS
EFIAPI
globals (UefiBootServicesTableLib, UefiRuntimeServicesTableLib)(
  VOID
);

EFI_STATUS
EFIAPI
= ImageHandle;(
  VOID
);

EFI_STATUS
EFIAPI
DXE services table(
  VOID
);

EFI_STATUS
EFIAPI
= EfiLibGetSystemConfigurationTable (&gDxeServicesTableGuid, (VOID**)&gDxeServicesTable);(
  VOID
);

EFI_STATUS
EFIAPI
PciUsra (MM PCI USA protocol)(
  VOID
);

EFI_STATUS
EFIAPI
(gMmPciUsra == NULL) {(
  VOID
);

EFI_STATUS
EFIAPI
HOB list(
  VOID
);

EFI_STATUS
EFIAPI
();(
  VOID
);

EFI_STATUS
EFIAPI
PCD PciExpressBaseAddress(
  VOID
);

EFI_STATUS
EFIAPI
= PcdGet64 (PcdPciExpressBaseAddress);(
  VOID
);

EFI_STATUS
EFIAPI
SGPIIO by configuing LPC bridge GPIO BASE I/O registers(
  VOID
);

EFI_STATUS
EFIAPI
(*((volatile CHAR8*)PciExpressBaseAddress + 0xF0004)) >= 0) {(
  VOID
);

EFI_STATUS
EFIAPI
delay (read TSC counter, wait 375us-1ms)(
  VOID
);

EFI_STATUS
EFIAPI
= (__getcallerseflags_w() & 0x200) != 0;(
  VOID
);

EFI_STATUS
EFIAPI
and install PCH SERIAL GPIO protocol(
  VOID
);

EFI_STATUS
EFIAPI
((DEBG_INFO, "InstalPchSerialGpio() Start\n"));(
  VOID
);

EFI_STATUS
EFIAPI
GPIO group(
  VOID
);

EFI_STATUS
EFIAPI
protocol(
  VOID
);

EFI_STATUS
EFIAPI
deferred initialization (AutoGen.c)(
  VOID
);

#endif /* __PCHSERIALGPIO_H__ */