PlatformErrorHandler Module

Overview

SMM platform error handler for Intel Purley platform. This DXE driver runs in SMM to handle platform RAS (Reliability, Availability, Serviceability) errors. It initializes EMCA (Enhanced Machine Check Architecture) platform hooks, populates RAS topology structures (SMBIOS Type 16/17), configures FPGA error handling policies from UEFI setup variables, registers SMM software dispatch callbacks for error notification, and manages per-socket error tracking via linked callbacks.

Source file: PurleyPlatPkg/Ras/Smm/ErrHandling/PlatformErrorHandler/PlatformErrorHandler.c

Address Range

0x300 - 0x5480 (83 functions, 5180 bytes .text)

Module State: Global Variables

Note: qword_ prefix variables are in the .data segment (0x6880-0x2AF00).

Key Functions

Entry Points (Public API)

• 0x5CC _ModuleEntryPoint: Standard UEFI DXE driver entry. Calls sub_30D8 for library constructor chain, then sub_3550 for main initialization. If main init returns error (<0), calls sub_34E0 fallback.

• 0x594 sub_594: SMM module entry path (registered via SMM SW dispatch or standalone entry). Calls sub_F0C (gSmst init) then sub_34E0.

Internal Helpers

Library Constructors (called from sub_30D8 chain):

RAS Topology & Setup Variable Handlers:

Error Policy Initialization:

Callback Registration (Public API for notification consumers):

Callback Dispatch:

EMCA MC Bank Access (from emcaplatformhookslib.c):

IO/Port Access:

Memory Helpers:

ASSERT/Debug Helpers:

Data Structures

MC Bank Entry (32 bytes per bank, indexed by socket number):

+0x00: uint32_t bank_status_1
+0x04: uint32_t bank_status_2  
+0x08: uint32_t bank_status_3
+...  : (rest 20 bytes)

Referenced via qword_7388, accessed by sub_1D8C, sub_1DE4, sub_1E3C with 32 * socket_index offset.

Notification Callback Node (24 bytes):

+0x00: uint64_t callback_function_pointer
+0x08: uint64_t next_node_ptr (linked list)
+0x10: uint8_t  priority (lower = higher priority, inserted sorted)

Allocated by sub_36B8, stored in priority-sorted linked list. Head: qword_72F0, Tail: qword_72F8.

Error Source Node (16 bytes):

+0x00: uint64_t source_data
+0x08: uint64_t next_node_ptr

Allocated by sub_35C8, stored in linked list. Head: qword_72E0.

FPGA Configuration HOB Structure (38 bytes):

Used by sub_2AE0 for FPGA config. Various bitfields for error enable/disable.

Setup Variable Table (at off_70D0, 3-word entries):

Triplets of (GUID_ptr, Name_ptr, Size) for each platform setup variable read by sub_2690:

• SocketIioConfig (0x1A0C bytes from 0x68B0/GUID)
• SocketCommonRcConfig (0xE0 bytes)
• SocketMpLinkConfig (0x155 bytes)
• SocketMemoryConfig (0x202 bytes)
• SocketPowerManagementConfig (0x1CE bytes)
• SocketProcessorCoreConfig (0x12D bytes)
• IntelSetup (0x2A4 bytes)
• PchRcConfiguration (0x5D7 bytes)
• MeRcConfiguration
• FpgaSocketConfig

GUIDs Used

Protocol GUIDs:

Calling Patterns

Driver Initialization Flow:

1. _ModuleEntryPoint (0x5CC)
2. sub_30D8 (0x30D8) - library constructor chain (12 constructors)
3. sub_3550 (0x3550) - main init
4. sub_3970 (0x3970) - core logic:
   a. Read RAS topology from HOB via sub_4700
   b. Read setup variables via sub_3E0C / sub_3D4C
   c. Apply error policy from setup via sub_5354
   d. Initialize OEM RAS via sub_29A4
   e. Save back setup via sub_F0C / sub_2998
   f. Init EMCA platform hooks via sub_3890
   g. Register SMM SW dispatch handlers (sub_252C + sub_25A8)
   h. Register SMM communication protocol

Error Notification Flow:

1. SMI received -> SMM SW Dispatch handler fires
2. Dispatches to sub_3810 / sub_3844 which iterate registered callbacks
3. Callbacks registered via sub_36B8 (notification) or sub_35C8 (source)

Setup Variable Read Flow:

1. sub_2690 reads all platform variables
2. Reads variables described by table at off_70D0
3. Either via gRT->GetVariable (DXE) or SmmVariableProtocol (SMM)
4. Accumulates into qword_7420 buffer (size 0x2A3B)

Dependencies

Consumed (this module calls):

• gBS (Boot Services): LocateProtocol, FreePool, etc.
• gSmst (SMM System Table 2): AllocatePool, LocateProtocol, SMM SW Dispatch2 register
• gRT (Runtime Services): GetVariable (for setup variables)
• EMCA Platform Protocol ({F4CCBFB7-F6E0-47FD-9DD4-10A8F150C191}): GetSmmSystemTable, IsInSmm, ReadMca
• SMM MC Bank Protocol: MC bank access
• SMM IPMI Transport Protocol ({1DBD1503-0A60-4230-AAA3-8016D8C3DE2F}): Send IPMI commands
• SMM Variable Protocol ({ED32D533-99E6-4209-9CC0-2D72CDD998A7}): Setup variable access in SMM
• SMM SW Dispatch2 Protocol ({6820ABD4-A292-4817-9147-D91DC8C53542}): Register SMI handlers

Consumed By (other modules call this):

• UEFI DXE drivers: Call _ModuleEntryPoint as standard DXE driver
• SMM modules: Call via SMM SW Dispatch (SMI triggers)
• RAS error handlers: Register callbacks via sub_36B8 (register notification callback) for error event delivery
• Platform OEM libraries: Via EMCA platform hooks protocol (OemRasLib.c sources)

Notes

1. This module has dual-mode operation: DXE (standard entry at startup) and SMM (interrupt-driven entry via SMI).
2. The off_6B60 callback table at 0x6B60 likely contains function pointers for SMM SW Dispatch handlers registered in sub_3970.
3. The module communicates with the FPGA to configure error handling at runtime via the FPGA Configuration HOB.
4. Debug strings reference "LenovoServerPkg/Library/LnvPurleyLib/OemRasLib/OemRasLib.c" for OEM RAS policy reading.
5. The EMCA platform hooks library at PurleySktPkg/Library/emcaplatformhookslib/emcaplatformhookslib.c provides the platform-specific MC bank initialization.
6. sub_3B94 at 0x3B94 initializes a large ~400+ byte structure with error policy configuration (per-socket/per-bank error enable/disable settings, thresholds).