/** @file
PpmInitialize.h -- Header for PpmInitialize
Copyright (c) HR650X BIOS Decompilation Project
**/
#ifndef __PPMINITIALIZE_H__
#define __PPMINITIALIZE_H__
#include "../uefi_headers/Uefi.h"
//
// Function Prototypes
//
EFI_STATUS
EFIAPI
PpmInitializeEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
PpmInitialize(
VOID
);
EFI_STATUS
EFIAPI
PpmInfoInit(
VOID
);
EFI_STATUS
EFIAPI
PpmIdleInit(
VOID
);
EFI_STATUS
EFIAPI
PpmPbfMsrConfig(
VOID
);
EFI_STATUS
EFIAPI
PpmEnergyEfficientTurboConfig(
VOID
);
EFI_STATUS
EFIAPI
PpmPackagePowerLimitConfig(
VOID
);
EFI_STATUS
EFIAPI
PpmPmaxOffsetSearch(
VOID
);
EFI_STATUS
EFIAPI
PpmBiosResetCpl(
VOID
);
EFI_STATUS
EFIAPI
SmmReadyToLockCallback(
VOID
);
EFI_STATUS
EFIAPI
ReadyToBootCallback(
VOID
);
EFI_STATUS
EFIAPI
InternalGetBootScriptTable(
VOID
);
EFI_STATUS
EFIAPI
InternalGetCpuConfigContext(
VOID
);
EFI_STATUS
EFIAPI
InternalGetRegAddr(
VOID
);
EFI_STATUS
EFIAPI
CpuidEx(
VOID
);
EFI_STATUS
EFIAPI
Cpuid(
VOID
);
EFI_STATUS
EFIAPI
ReadTsc(
VOID
);
EFI_STATUS
EFIAPI
CpuPause(
VOID
);
EFI_STATUS
EFIAPI
EnableInterrupts(
VOID
);
EFI_STATUS
EFIAPI
DisableInterrupts(
VOID
);
EFI_STATUS
EFIAPI
ReadEflags(
VOID
);
EFI_STATUS
EFIAPI
ZeroMemSafe(
VOID
);
EFI_STATUS
EFIAPI
PciRead32(
VOID
);
EFI_STATUS
EFIAPI
PciWrite32(
VOID
);
EFI_STATUS
EFIAPI
IoRead32(
VOID
);
EFI_STATUS
EFIAPI
IoRead16(
VOID
);
EFI_STATUS
EFIAPI
IoWrite16(
VOID
);
EFI_STATUS
EFIAPI
IoRead8(
VOID
);
EFI_STATUS
EFIAPI
IoWrite8(
VOID
);
EFI_STATUS
EFIAPI
BootScriptAllocate(
VOID
);
EFI_STATUS
EFIAPI
BootScriptCloseTable(
VOID
);
EFI_STATUS
EFIAPI
S3BootScriptSaveMsrWrite(
VOID
);
EFI_STATUS
EFIAPI
DebugPrintHandler(
VOID
);
EFI_STATUS
EFIAPI
AssertHandler(
VOID
);
EFI_STATUS
EFIAPI
data (gImageHandle, gST, gBS, gRT) are declared in(
VOID
);
EFI_STATUS
EFIAPI
and UefiRuntimeServicesTableLib headers.(
VOID
);
EFI_STATUS
EFIAPI
EFI_MP_SERVICES_PROTOCOL *mMpService = NULL;(
VOID
);
EFI_STATUS
EFIAPI
Entry Point(
VOID
);
EFI_STATUS
EFIAPI
PPM enable flag(
VOID
);
EFI_STATUS
EFIAPI
((INT8)*((UINT8 *)GetPcdProtocol ()->GetPcd (PCD_TOKEN_PPM_TDP)) >= 0) {(
VOID
);
EFI_STATUS
EFIAPI
PPM Initialization(
VOID
);
EFI_STATUS
EFIAPI
PPM Info structures (PpmInfo.c equivalent)(
VOID
);
EFI_STATUS
EFIAPI
();(
VOID
);
EFI_STATUS
EFIAPI
PPM MSR config on all APs, then BSP(
VOID
);
EFI_STATUS
EFIAPI
SmmReadyToLock event(
VOID
);
EFI_STATUS
EFIAPI
= gBootServices->CreateEvent ((
VOID
);
EFI_STATUS
EFIAPI
Info Initialization(
VOID
);
EFI_STATUS
EFIAPI
CPUID(
VOID
);
EFI_STATUS
EFIAPI
(CPUID_VERSION_INFO, 0, &CpuidEax, NULL, NULL, NULL);(
VOID
);
EFI_STATUS
EFIAPI
MP Service protocol(
VOID
);
EFI_STATUS
EFIAPI
= gBootServices->LocateProtocol ((
VOID
);
EFI_STATUS
EFIAPI
PPM Info HOB(
VOID
);
EFI_STATUS
EFIAPI
= (GUID *)TableData;(
VOID
);
EFI_STATUS
EFIAPI
per-socket buffer(
VOID
);
EFI_STATUS
EFIAPI
= gBootServices->AllocatePool ((
VOID
);
EFI_STATUS
EFIAPI
SMM Communication protocol(
VOID
);
EFI_STATUS
EFIAPI
Configure TDP(
VOID
);
EFI_STATUS
EFIAPI
MSR Configuration (per socket, per thread)(
VOID
);
EFI_STATUS
EFIAPI
BSP index(
VOID
);
EFI_STATUS
EFIAPI
= 0;(
VOID
);
EFI_STATUS
EFIAPI
(0x1FC)(
VOID
);
EFI_STATUS
EFIAPI
= AsmReadMsr64 (MSR_PPM_CURRENT_CONFIG);(
VOID
);
EFI_STATUS
EFIAPI
(0x603)(
VOID
);
EFI_STATUS
EFIAPI
= AsmReadMsr64 (MSR_PM_PBF_MISC_CTL);(
VOID
);
EFI_STATUS
EFIAPI
(0x601)(
VOID
);
EFI_STATUS
EFIAPI
= AsmReadMsr64 (MSR_PM_PBF_CMD);(
VOID
);
EFI_STATUS
EFIAPI
MSR programming for interrupt/ratio limits(
VOID
);
/// C-state way
EFI_STATUS
EFIAPI
(0xA01)(
VOID
);
EFI_STATUS
EFIAPI
= AsmReadMsr64 (MSR_PM_WAY_0);(
VOID
);
EFI_STATUS
EFIAPI
enable(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT8 *)((UINTN)mPpmContext + 299)) {(
VOID
);
EFI_STATUS
EFIAPI
type specific: SKX (0x5065) and variants(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT32 *)(GetPpmInfoTable () + 72) == 0x5065 ||(
VOID
);
EFI_STATUS
EFIAPI
(0x1AA)(
VOID
);
EFI_STATUS
EFIAPI
((*(UINT8 *)((UINTN)mPpmContext + 150) & 4) != 0) {(
VOID
);
EFI_STATUS
EFIAPI
power limit config(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT32 *)(GetPpmInfoTable () + 72) == 0x50655 &&(
VOID
);
EFI_STATUS
EFIAPI
core programming via MSR_PM_DISABLE (0x774)(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT8 *)((UINTN)mPpmContext + 223)) {(
VOID
);
EFI_STATUS
EFIAPI
Idle / C-State Initialization(
VOID
);
EFI_STATUS
EFIAPI
(0xE2)(
VOID
);
EFI_STATUS
EFIAPI
= AsmReadMsr64 (MSR_PKG_CST_CONFIG_CONTROL);(
VOID
);
EFI_STATUS
EFIAPI
C1E and C-state limits(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT8 *)((UINTN)mPpmContext + 216) &&(
VOID
);
EFI_STATUS
EFIAPI
IO MWAIT redirection(
VOID
);
EFI_STATUS
EFIAPI
(*(INT8 *)((UINTN)mPpmContext + 4) < 0) {(
VOID
);
EFI_STATUS
EFIAPI
PBF MSR Configuration(
VOID
);
EFI_STATUS
EFIAPI
PPM_LIMIT_RATIOS(
VOID
);
EFI_STATUS
EFIAPI
MsrLimitRatios;(
VOID
);
EFI_STATUS
EFIAPI
bit 20 and program from context(
VOID
);
EFI_STATUS
EFIAPI
&= 0xFFEFFFFF;(
VOID
);
EFI_STATUS
EFIAPI
MSR_PPM_INTERRUPT and MSR_PPM_INTERRUPT2 with mask values(
VOID
);
EFI_STATUS
EFIAPI
= *(UINT64 *)((UINTN)mPpmContext + 265) | (MsrInterrupt & *(UINT64 *)((UINTN)mPpmContext + 273));(
VOID
);
EFI_STATUS
EFIAPI
Energy-Efficient Turbo / HWP Configuration(
VOID
);
EFI_STATUS
EFIAPI
for Package C-state limit type 3(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT8 *)((UINTN)mPpmContext + 212) == 3) {(
VOID
);
EFI_STATUS
EFIAPI
power limit MSR_MSR_PKG_POWER_LIMIT if needed(
VOID
);
EFI_STATUS
EFIAPI
(*(UINT8 *)((UINTN)mPpmContext + 215)) {(
VOID
);
EFI_STATUS
EFIAPI
Package Power Limit Configuration(
VOID
);
EFI_STATUS
EFIAPI
area configures package power limit MSR registers.(
VOID
);
EFI_STATUS
EFIAPI
the original binary, this is found in the SKX-specific(
VOID
);
EFI_STATUS
EFIAPI
within PpmMsrConfig.(
VOID
);
EFI_STATUS
EFIAPI
PMAX Offset Table Search(
VOID
);
EFI_STATUS
EFIAPI
CPU configuration context(
VOID
);
EFI_STATUS
EFIAPI
= (UINTN)GetPcdProtocol ()->GetPcd (PCD_TOKEN_PM_MODE);(
VOID
);
EFI_STATUS
EFIAPI
TDP and IccMax from PPM config registers(
VOID
);
EFI_STATUS
EFIAPI
= ((UINT32)GetPcdProtocol ()->GetPcd (PCD_TOKEN_PPM_TDP) >> 3) & 7;(
VOID
);
EFI_STATUS
EFIAPI
table-based PMAX offset search(
VOID
);
EFI_STATUS
EFIAPI
= (UINT32)GetPcdProtocol ()->GetPcd (PCD_TOKEN_PPM_INFO);(
VOID
);
EFI_STATUS
EFIAPI
MSR-based TDP(
VOID
);
EFI_STATUS
EFIAPI
MsrTdp;(
VOID
);
EFI_STATUS
EFIAPI
Handshake(
VOID
);
EFI_STATUS
EFIAPI
current register value(
VOID
);
EFI_STATUS
EFIAPI
= GetPcdProtocol ()->GetPcd (PCD_TOKEN_PPM_INFO);(
VOID
);
EFI_STATUS
EFIAPI
CPL value based on phase(
VOID
);
EFI_STATUS
EFIAPI
(CplPhase) {(
VOID
);
EFI_STATUS
EFIAPI
CplPhase is 0, set bit 0(
VOID
);
EFI_STATUS
EFIAPI
(CplPhase == 0) {(
VOID
);
EFI_STATUS
EFIAPI
CPL value to register and record in boot script(
VOID
);
EFI_STATUS
EFIAPI
()->GetPcd (PCD_TOKEN_PPM_INFO);(
VOID
);
EFI_STATUS
EFIAPI
for PCU acknowledgement(
VOID
);
EFI_STATUS
EFIAPI
= 5;(
VOID
);
EFI_STATUS
EFIAPI
Callback(
VOID
);
EFI_STATUS
EFIAPI
boot script table(
VOID
);
EFI_STATUS
EFIAPI
(NULL);(
VOID
);
EFI_STATUS
EFIAPI
boot script buffer(
VOID
);
EFI_STATUS
EFIAPI
boot script pool(
VOID
);
EFI_STATUS
EFIAPI
*ScriptBuffer;(
VOID
);
EFI_STATUS
EFIAPI
Helpers(
VOID
);
EFI_STATUS
EFIAPI
/ TSC / Intrinsics(
VOID
);
EFI_STATUS
EFIAPI
/ HOB / PCD Helpers(
VOID
);
EFI_STATUS
EFIAPI
Boot Script Helpers(
VOID
);
EFI_STATUS
EFIAPI
new buffer(
VOID
);
EFI_STATUS
EFIAPI
Status;(
VOID
);
EFI_STATUS
EFIAPI
SmmReadyToLock event for boot script save(
VOID
);
EFI_STATUS
EFIAPI
= (VOID *)GetPcdProtocol ()->GetPcd (PCD_TOKEN_CPU_PM_REG_ADDR);(
VOID
);
EFI_STATUS
EFIAPI
the original binary, this writes the table length and(
VOID
);
EFI_STATUS
EFIAPI
the boot script entry list.(
VOID
);
EFI_STATUS
EFIAPI
(mS3BootScriptInited) {(
VOID
);
EFI_STATUS
EFIAPI
the S3 boot script table(
VOID
);
EFI_STATUS
EFIAPI
current entry count(
VOID
);
EFI_STATUS
EFIAPI
= 3 * MsrIndex;(
VOID
);
EFI_STATUS
EFIAPI
to expand the buffer(
VOID
);
EFI_STATUS
EFIAPI
NewCount;(
VOID
);
EFI_STATUS
EFIAPI
boot script entry(
VOID
);
EFI_STATUS
EFIAPI
= *(UINTN *)(*(UINTN *)(ConfigContext + 40) + 8 * Index + 16);(
VOID
);
EFI_STATUS
EFIAPI
HOB Search(
VOID
);
EFI_STATUS
EFIAPI
Copy Implementation (Used internally by boot script save)(
VOID
);
EFI_STATUS
EFIAPI
= &Src[Count - 1];(
VOID
);
EFI_STATUS
EFIAPI
forward in 8-byte chunks then remainder(
VOID
);
EFI_STATUS
EFIAPI
Count8;(
VOID
);
EFI_STATUS
EFIAPI
/ Print Handler(
VOID
);
EFI_STATUS
EFIAPI
CMOS 0x4B to get platform ID(
VOID
);
EFI_STATUS
EFIAPI
(0x70, IoRead8 (0x70) & 0x80 | 0x4B);(
VOID
);
EFI_STATUS
EFIAPI
error level mapping based on platform ID(
VOID
);
EFI_STATUS
EFIAPI
(PlatformId) {(
VOID
);
EFI_STATUS
EFIAPI
equivalent(
VOID
);
EFI_STATUS
EFIAPI
debug protocol if error level matches(
VOID
);
EFI_STATUS
EFIAPI
(ErrorLevel != 0) {(
VOID
);
EFI_STATUS
EFIAPI
Macro Implementation(
VOID
);
#endif /* __PPMINITIALIZE_H__ */