/** @file
  RegAccessSMM.h -- Header for RegAccessSMM

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __REGACCESSSMM_H__
#define __REGACCESSSMM_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
ModuleEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
RegAccessSmmConstructor(
  VOID
);

EFI_STATUS
EFIAPI
RegAccessSmmDestructor(
  VOID
);

EFI_STATUS
EFIAPI
RegAccessSmmEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
S3BootScriptLibInitialize(
  VOID
);

EFI_STATUS
EFIAPI
CopyMem(
  VOID
);

EFI_STATUS
EFIAPI
ZeroMem(
  VOID
);

EFI_STATUS
EFIAPI
DebugPrint(
  VOID
);

EFI_STATUS
EFIAPI
DebugAssert(
  VOID
);

EFI_STATUS
EFIAPI
AcquireSpinLock(
  VOID
);

EFI_STATUS
EFIAPI
ReleaseSpinLock(
  VOID
);

EFI_STATUS
EFIAPI
S3BootScriptNotifyDxeSmmReadyToLock(
  VOID
);

EFI_STATUS
EFIAPI
UsraDecodeAddress(
  VOID
);

EFI_STATUS
EFIAPI
UsraSocketDataInit(
  VOID
);

EFI_STATUS
EFIAPI
Variables (.data segment: 0x6380-0x67E0)(
  VOID
);

EFI_STATUS
EFIAPI
System State(
  VOID
);

EFI_STATUS
EFIAPI
EFI_RUNTIME_SERVICES      *gRuntimeServices     = NULL;  // 0x6510(
  VOID
);

EFI_STATUS
EFIAPI
VOID                       *gDebugProtocol      = NULL;  // 0x6528(
  VOID
);

EFI_STATUS
EFIAPI
UINT64                      gPciExpressBaseAddr = 0;     // 0x6538(
  VOID
);

EFI_STATUS
EFIAPI
UINT64                      gTscFrequency       = 0;     // 0x6548(
  VOID
);

EFI_STATUS
EFIAPI
byte(
  VOID
);

EFI_STATUS
EFIAPI
// USRA / IIO Topology(
  VOID
);

EFI_STATUS
EFIAPI
BOOLEAN                     gCsrViaMsr          = FALSE; // 0x6568 byte(
  VOID
);

EFI_STATUS
EFIAPI
BOOLEAN                     gUsraBatchActive    = FALSE; // 0x65B0 byte(
  VOID
);

EFI_STATUS
EFIAPI
UINT64                      gModuleStatus       = 0;     // 0x66C8(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                      *gIioProtocolData    = NULL;  // 0x66D8(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                       gSocketTopoData[24];        // 0x66E4(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                       gSocketCnt          = 0;     // 0x670D(
  VOID
);

EFI_STATUS
EFIAPI
UINT32                      gSockPrMask         = 0;     // 0x6712(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                       gCpuStepping        = 0;     // 0x671A(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                       gMaxPciePorts       = 0;     // 0x671C(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                       gIioPresenceActive  = 0;     // 0x676C(
  VOID
);

EFI_STATUS
EFIAPI
UINT32                      gSockPrMaskActive   = 0;     // 0x6772(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                       gMaxPciePortsActive = 0;     // 0x677C(
  VOID
);

EFI_STATUS
EFIAPI
Boot Script State(
  VOID
);

EFI_STATUS
EFIAPI
BOOLEAN                     gS3ReadyToLockFlag  = FALSE; // 0x6578 byte(
  VOID
);

EFI_STATUS
EFIAPI
EFI_SMM_S3_PROTOCOL        *gSmmS3Protocol      = NULL;  // 0x6588(
  VOID
);

EFI_STATUS
EFIAPI
VOID                       *gS3RdyBootReg       = NULL;  // 0x6598(
  VOID
);

EFI_STATUS
EFIAPI
UINT8                      *gS3BootScriptData2  = NULL;  // 0x67A8(
  VOID
);

EFI_STATUS
EFIAPI
State(
  VOID
);

EFI_STATUS
EFIAPI
16 bytes(
  VOID
);

EFI_STATUS
EFIAPI
UINT64                      gSmramRangeCnt      = 0;     // 0x67C0(
  VOID
);

EFI_STATUS
EFIAPI
// ---------------------------------------------------------------------------(
  VOID
);

EFI_STATUS
EFIAPI
Entry Point (AutoGen)(
  VOID
);

EFI_STATUS
EFIAPI
are debug ASSERT_NOT_REACHED markers from AutoGen(
  VOID
);

EFI_STATUS
EFIAPI
SMRAM range count(
  VOID
);

EFI_STATUS
EFIAPI
of UINT64 pairs(
  VOID
);

EFI_STATUS
EFIAPI
ticks per 10 ms(
  VOID
);

EFI_STATUS
EFIAPI
LockBox communication configuration table(
  VOID
);

EFI_STATUS
EFIAPI
IioProtocol and CSR/MSR routing(
  VOID
);

EFI_STATUS
EFIAPI
line size in QWORDs(
  VOID
);

EFI_STATUS
EFIAPI
hyper-threading: adjust for logical processors per core(
  VOID
);

EFI_STATUS
EFIAPI
cache-aligned region + spinlock at end(
  VOID
);

EFI_STATUS
EFIAPI
S3 boot script(
  VOID
);

EFI_STATUS
EFIAPI
LockBox communication config table if installed(
  VOID
);

EFI_STATUS
EFIAPI
SMRAM ranges pool(
  VOID
);

EFI_STATUS
EFIAPI
Boot Script Library(
  VOID
);

EFI_STATUS
EFIAPI
call from constructor(
  VOID
);

EFI_STATUS
EFIAPI
default-sized boot script table(
  VOID
);

EFI_STATUS
EFIAPI
DxeSmmReadyToLock notification(
  VOID
);

EFI_STATUS
EFIAPI
SMM S3 protocol(
  VOID
);

EFI_STATUS
EFIAPI
S3 memory descriptor(
  VOID
);

EFI_STATUS
EFIAPI
S3 notifications(
  VOID
);

EFI_STATUS
EFIAPI
ReadyToBoot notification(
  VOID
);

EFI_STATUS
EFIAPI
per decompilation of sub_1DC8, sub_1E24, sub_2554, etc.)(
  VOID
);

EFI_STATUS
EFIAPI
implementation in RegAccessSMM_full.c(
  VOID
);

EFI_STATUS
EFIAPI
Functions(
  VOID
);

EFI_STATUS
EFIAPI
no overflow(
  VOID
);

EFI_STATUS
EFIAPI
CMOS debug level: port 0x70 index 0x4C, port 0x71 data(
  VOID
);

EFI_STATUS
EFIAPI
to standard error level(
  VOID
);

EFI_STATUS
EFIAPI
SMM Debug protocol print(
  VOID
);

EFI_STATUS
EFIAPI
Spinlock(
  VOID
);

EFI_STATUS
EFIAPI
Interface(
  VOID
);

EFI_STATUS
EFIAPI
Boot Script: notify DxeSmmReadyToLock(
  VOID
);

EFI_STATUS
EFIAPI
boot script data from LockBox(
  VOID
);

EFI_STATUS
EFIAPI
updated boot script data to LockBox(
  VOID
);

EFI_STATUS
EFIAPI
Register Access(
  VOID
);

EFI_STATUS
EFIAPI
socket topology data(
  VOID
);

EFI_STATUS
EFIAPI
high bits in register address(
  VOID
);

EFI_STATUS
EFIAPI
socket MMIO base(
  VOID
);

EFI_STATUS
EFIAPI
box instance(
  VOID
);

EFI_STATUS
EFIAPI
with original(
  VOID
);

EFI_STATUS
EFIAPI
Topology Initialization(
  VOID
);

EFI_STATUS
EFIAPI
IIO protocol(
  VOID
);

EFI_STATUS
EFIAPI
per-socket topology data (4 sockets, 6 bytes per socket)(
  VOID
);

EFI_STATUS
EFIAPI
BDF data(
  VOID
);

EFI_STATUS
EFIAPI
type(
  VOID
);

EFI_STATUS
EFIAPI
addr(
  VOID
);

EFI_STATUS
EFIAPI
// Copy raw IO data (6 bytes per socket)(
  VOID
);

EFI_STATUS
EFIAPI
to active set(
  VOID
);

#endif /* __REGACCESSSMM_H__ */