/** @file
SioDxeInit.h -- Header for SioDxeInit
Copyright (c) HR650X BIOS Decompilation Project
**/
#ifndef __SIODXEINIT_H__
#define __SIODXEINIT_H__
#include "../uefi_headers/Uefi.h"
//
// Function Prototypes
//
EFI_STATUS
EFIAPI
SioDeviceInit(
VOID
);
EFI_STATUS
EFIAPI
PchPcrWriteReg(
VOID
);
EFI_STATUS
EFIAPI
PchDetectSku(
VOID
);
EFI_STATUS
EFIAPI
IsInterruptsEnabled(
VOID
);
EFI_STATUS
EFIAPI
GetConfigTable(
VOID
);
EFI_STATUS
EFIAPI
SioMmioBase(
VOID
);
EFI_STATUS
EFIAPI
EnableInterrupts(
VOID
);
EFI_STATUS
EFIAPI
DisableInterrupts(
VOID
);
EFI_STATUS
EFIAPI
ReadEflags(
VOID
);
EFI_STATUS
EFIAPI
IoRead16(
VOID
);
EFI_STATUS
EFIAPI
IoWrite16(
VOID
);
EFI_STATUS
EFIAPI
IoRead16Alt(
VOID
);
EFI_STATUS
EFIAPI
IoWrite16Alt(
VOID
);
EFI_STATUS
EFIAPI
IoRead32(
VOID
);
EFI_STATUS
EFIAPI
IoWrite32(
VOID
);
EFI_STATUS
EFIAPI
PciRead32(
VOID
);
EFI_STATUS
EFIAPI
PciWrite32(
VOID
);
EFI_STATUS
EFIAPI
PciRead16(
VOID
);
EFI_STATUS
EFIAPI
PciWrite16(
VOID
);
EFI_STATUS
EFIAPI
DebugPrint(
VOID
);
EFI_STATUS
EFIAPI
DebugAssert(
VOID
);
EFI_STATUS
EFIAPI
ReadUnaligned64(
VOID
);
EFI_STATUS
EFIAPI
CompareGuid(
VOID
);
EFI_STATUS
EFIAPI
DebugGetLevel(
VOID
);
EFI_STATUS
EFIAPI
ConfigureLpcIoRange(
VOID
);
EFI_STATUS
EFIAPI
SetLpcRegisterRaw(
VOID
);
EFI_STATUS
EFIAPI
ConfigureLpcDecode(
VOID
);
EFI_STATUS
EFIAPI
SioDxeInitPre(
VOID
);
EFI_STATUS
EFIAPI
ModuleEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
SioDeviceRead(
VOID
);
EFI_STATUS
EFIAPI
SioDeviceWrite(
VOID
);
EFI_STATUS
EFIAPI
SioDeviceRegister(
VOID
);
EFI_STATUS
EFIAPI
SioDriverBindingStart(
VOID
);
EFI_STATUS
EFIAPI
variable declarations(
VOID
);
EFI_STATUS
EFIAPI
service table pointers (cached at driver startup)(
VOID
);
EFI_STATUS
EFIAPI
*gST; ///< offset 0x2658(
VOID
);
EFI_STATUS
EFIAPI
instance handle installed protocols on(
VOID
);
EFI_STATUS
EFIAPI
mDriverHandle = NULL; ///< offset 0x2650(
VOID
);
EFI_STATUS
EFIAPI
DXE Init protocol structure (installed as protocol interface)(
VOID
);
EFI_STATUS
EFIAPI
mSioDxeInitProtocol; ///< offset 0x2600(
VOID
);
EFI_STATUS
EFIAPI
PCH SKU type (detected at runtime)(
VOID
);
EFI_STATUS
EFIAPI
= Unknown, 1 = LbgPch, 2 = LbgPchH, 3 = Unsupported(
VOID
);
EFI_STATUS
EFIAPI
mPchSkuType = 3; ///< offset 0x2644(
VOID
);
EFI_STATUS
EFIAPI
library state (report status code protocol)(
VOID
);
EFI_STATUS
EFIAPI
*mDebugLib = NULL; ///< offset 0x2678(
VOID
);
EFI_STATUS
EFIAPI
declarations of local helper functions(
VOID
);
EFI_STATUS
EFIAPI
control helpers(
VOID
);
EFI_STATUS
EFIAPI
-- Enable interrupts (STI)(
VOID
);
EFI_STATUS
EFIAPI
VOID(
VOID
);
EFI_STATUS
EFIAPI
-- Disable interrupts (CLI)(
VOID
);
EFI_STATUS
EFIAPI
-- Read EFLAGS(
VOID
);
EFI_STATUS
EFIAPI
UINTN(
VOID
);
EFI_STATUS
EFIAPI
-- Check if interrupts are enabled (EFLAGS.IF bit 9)(
VOID
);
EFI_STATUS
EFIAPI
BOOLEAN(
VOID
);
EFI_STATUS
EFIAPI
-- Read UINT16 from I/O port (word-aligned check)(
VOID
);
EFI_STATUS
EFIAPI
UINT16(
VOID
);
EFI_STATUS
EFIAPI
-- Write UINT16 to I/O port (word-aligned check)(
VOID
);
EFI_STATUS
EFIAPI
-- Read UINT16 from I/O port(
VOID
);
EFI_STATUS
EFIAPI
-- Write UINT16 to I/O port(
VOID
);
EFI_STATUS
EFIAPI
-- Read UINT32 from I/O port (dword-aligned check)(
VOID
);
EFI_STATUS
EFIAPI
UINT32(
VOID
);
EFI_STATUS
EFIAPI
-- Write UINT32 to I/O port (dword-aligned check)(
VOID
);
EFI_STATUS
EFIAPI
Configuration via CF8/CFC (legacy I/O method)(
VOID
);
EFI_STATUS
EFIAPI
-- Read DWORD from PCI config space via CF8/CFC(
VOID
);
EFI_STATUS
EFIAPI
-- Write DWORD to PCI config space via CF8/CFC(
VOID
);
EFI_STATUS
EFIAPI
-- Read WORD from PCI config space via CF8/CFC(
VOID
);
EFI_STATUS
EFIAPI
-- Write WORD to PCI config space via CF8/CFC(
VOID
);
EFI_STATUS
EFIAPI
-- Internal memory copy with overlap support(
VOID
);
EFI_STATUS
EFIAPI
VOID *(
VOID
);
EFI_STATUS
EFIAPI
from above: copy backwards(
VOID
);
EFI_STATUS
EFIAPI
*DstEnd = (UINT8 *)Destination + Length - 1;(
VOID
);
EFI_STATUS
EFIAPI
Count8 = Length >> 3;(
VOID
);
EFI_STATUS
EFIAPI
PCR (Private Config Register) Write(
VOID
);
EFI_STATUS
EFIAPI
-- Write to PCH PCR register (base 0xFDEF0000)(
VOID
);
EFI_STATUS
EFIAPI
byte, word, and dword accesses.(
VOID
);
EFI_STATUS
EFIAPI
-- Detect PCH SKU type from LPC device ID (PCR register)(
VOID
);
EFI_STATUS
EFIAPI
} else if ((LpcDevId + 0x5E40) >= 0x100 &&(
VOID
);
EFI_STATUS
EFIAPI
} else {(
VOID
);
EFI_STATUS
EFIAPI
Library(
VOID
);
EFI_STATUS
EFIAPI
-- Get the debug library instance (report status code protocol)(
VOID
);
EFI_STATUS
EFIAPI
-- Debug print with severity mask check(
VOID
);
EFI_STATUS
EFIAPI
-- ASSERT check with debug print(
VOID
);
EFI_STATUS
EFIAPI
Services Table Retrieval(
VOID
);
EFI_STATUS
EFIAPI
-- Locate a configuration table by GUID from the system table(
VOID
);
EFI_STATUS
EFIAPI
EFI_STATUS(
VOID
);
EFI_STATUS
EFIAPI
-- Read 8 bytes unaligned(
VOID
);
EFI_STATUS
EFIAPI
UINT64(
VOID
);
EFI_STATUS
EFIAPI
-- Compare two GUIDs (two 64-bit compare)(
VOID
);
EFI_STATUS
EFIAPI
Services / HOB / Protocol retrieval helpers(
VOID
);
EFI_STATUS
EFIAPI
-- Get the HOB list pointer from the configuration table(
VOID
);
EFI_STATUS
EFIAPI
-- Locate PCD protocol (lazy init)(
VOID
);
EFI_STATUS
EFIAPI
PCD_PROTOCOL *(
VOID
);
EFI_STATUS
EFIAPI
-- Get SIO MMIO base via MM PCI USRA protocol(
VOID
);
EFI_STATUS
EFIAPI
the LPC bridge (B0 D31 F0) to get the(
VOID
);
EFI_STATUS
EFIAPI
D31 F0(
VOID
);
EFI_STATUS
EFIAPI
PciAddress.RegisterOffset = 0;(
VOID
);
EFI_STATUS
EFIAPI
Level Filter (sub_CF0)(
VOID
);
EFI_STATUS
EFIAPI
-- Read the current debug level from CMOS (RTC register 0x4B)(
VOID
);
EFI_STATUS
EFIAPI
EFI_D_INFO, EFI_D_WARN, or 0.(
VOID
);
EFI_STATUS
EFIAPI
CMOS index, set to debug register 0x4B(
VOID
);
EFI_STATUS
EFIAPI
= __inbyte (0x70);(
VOID
);
EFI_STATUS
EFIAPI
platform debug enable (0xFDAF0490 register bit 1)(
VOID
);
EFI_STATUS
EFIAPI
= (*(volatile UINT8 *)0xFDAF0490 & 2) | 1;(
VOID
);
EFI_STATUS
EFIAPI
debug level to EFI_D_ mask values(
VOID
);
EFI_STATUS
EFIAPI
(DebugLevel == 1) {(
VOID
);
EFI_STATUS
EFIAPI
}(
VOID
);
EFI_STATUS
EFIAPI
I/O Cycle Decode Configuration (sub_1450 / sub_1038 / sub_F0C)(
VOID
);
EFI_STATUS
EFIAPI
-- Configure a new LPC I/O range decode entry.(
VOID
);
EFI_STATUS
EFIAPI
the 4-entry I/O range decode table in SIO MMIO.(
VOID
);
EFI_STATUS
EFIAPI
an available slot or resizes an existing overlapping range.(
VOID
);
EFI_STATUS
EFIAPI
existing ranges for overlap or empty slot(
VOID
);
EFI_STATUS
EFIAPI
(EntryIndex = 0; EntryIndex < 4; EntryIndex++) {(
VOID
);
/// create entry
EFI_STATUS
EFIAPI
slot found(
VOID
);
EFI_STATUS
EFIAPI
= (IoBase & LPC_IO_PORT_ENTRY_BASE_MASK) |(
VOID
);
EFI_STATUS
EFIAPI
IoBase within range(
VOID
);
/// update existing range
EFI_STATUS
EFIAPI
detected(
VOID
);
EFI_STATUS
EFIAPI
-- Set up a custom IO range entry when DeviceType == 0xFF.(
VOID
);
EFI_STATUS
EFIAPI
LPC IO decode for a specific I/O address.(
VOID
);
EFI_STATUS
EFIAPI
by sub_1038 for raw register access configurations.(
VOID
);
EFI_STATUS
EFIAPI
LPC IO decode registers at the given Cf8 address(
VOID
);
EFI_STATUS
EFIAPI
find which slot matches the requested register.(
VOID
);
EFI_STATUS
EFIAPI
= Register;(
VOID
);
EFI_STATUS
EFIAPI
-- Core LPC IO cycle decode configuration.(
VOID
);
EFI_STATUS
EFIAPI
legacy device I/O ranges through the PCH LPC bridge.(
VOID
);
EFI_STATUS
EFIAPI
if (IoConfig != 0) {(
VOID
);
EFI_STATUS
EFIAPI
case 3: // GPIO(
VOID
);
EFI_STATUS
EFIAPI
IoWrite16 (SIO_CONFIG_PORT, SIO_UNLOCK_KEY);(
VOID
);
EFI_STATUS
EFIAPI
IoWrite16 (SIO_CONFIG_PORT, SIO_GLOBAL_LOCK);(
VOID
);
EFI_STATUS
EFIAPI
break;(
VOID
);
EFI_STATUS
EFIAPI
register access(
VOID
);
EFI_STATUS
EFIAPI
Protocol Implementation (sub_948)(
VOID
);
EFI_STATUS
EFIAPI
-- Initialize a specific SIO device (AST2500 DxeInit path)(
VOID
);
EFI_STATUS
EFIAPI
device configuration based on type.(
VOID
);
EFI_STATUS
EFIAPI
Entry Point (sub_45C + _ModuleEntryPoint)(
VOID
);
EFI_STATUS
EFIAPI
-- Driver entry-point initialization.(
VOID
);
EFI_STATUS
EFIAPI
up service table pointers, locates protocols(
VOID
);
EFI_STATUS
EFIAPI
PCH LPC I/O decode range, and installs(
VOID
);
EFI_STATUS
EFIAPI
SIO protocol interface.(
VOID
);
EFI_STATUS
EFIAPI
UEFI service table pointers(
VOID
);
EFI_STATUS
EFIAPI
= ImageHandle;(
VOID
);
EFI_STATUS
EFIAPI
DXE Services Table(
VOID
);
EFI_STATUS
EFIAPI
= GetConfigTable (&gEfiDxeServicesTableGuid, (VOID **)&gDS);(
VOID
);
EFI_STATUS
EFIAPI
MM PCI USRA protocol(
VOID
);
EFI_STATUS
EFIAPI
(mPciUsra == NULL) {(
VOID
);
EFI_STATUS
EFIAPI
HOB list(
VOID
);
EFI_STATUS
EFIAPI
();(
VOID
);
EFI_STATUS
EFIAPI
PCD protocol and configure PCIe segment bus(
VOID
);
EFI_STATUS
EFIAPI
SIO protocol interface(
VOID
);
EFI_STATUS
EFIAPI
= gBS->InstallMultipleProtocolInterfaces ((
VOID
);
EFI_STATUS
EFIAPI
Module Entry Point (sub_3C0 -> _ModuleEntryPoint)(
VOID
);
EFI_STATUS
EFIAPI
(at 0x3C0)(
VOID
);
EFI_STATUS
EFIAPI
UEFI DXE driver entry point.(
VOID
);
EFI_STATUS
EFIAPI
SioDxeInitPre to initialize, then installs the SIO protocol.(
VOID
);
EFI_STATUS
EFIAPI
EFIAPI(
VOID
);
EFI_STATUS
EFIAPI
driver(
VOID
);
EFI_STATUS
EFIAPI
= SioDxeInitPre (ImageHandle, SystemTable);(
VOID
);
EFI_STATUS
EFIAPI
protocol interface(
VOID
);
EFI_STATUS
EFIAPI
= gBS;(
VOID
);
EFI_STATUS
EFIAPI
Protocol: SIO Device Read (SioDeviceRead stub)(
VOID
);
EFI_STATUS
EFIAPI
Protocol: SIO Device Write (SioDeviceWrite stub)(
VOID
);
EFI_STATUS
EFIAPI
Protocol: SIO Device Register (SioDeviceRegister stub)(
VOID
);
EFI_STATUS
EFIAPI
structure initialization(
VOID
);
EFI_STATUS
EFIAPI
definitions and protocol references(
VOID
);
EFI_STATUS
EFIAPI
Protocol GUID: {9D36F7EF-6078-4419-8C46-2BBDB0E0C7B3}(
VOID
);
EFI_STATUS
EFIAPI
gEfiGenericSioProtocolGuid = SIO_PROTOCOL_GUID;(
VOID
);
EFI_STATUS
EFIAPI
-- SIO Driver Binding protocol "Start" stub(
VOID
);
EFI_STATUS
EFIAPI
-- Driver binding Start() function.(
VOID
);
EFI_STATUS
EFIAPI
controller handle and initializes SIO.(
VOID
);
EFI_STATUS
EFIAPI
SIO protocol instance(
VOID
);
#endif /* __SIODXEINIT_H__ */