/** @file
  StaticSkuDataDxeLightningRidgeEXECB3.h -- Header for StaticSkuDataDxeLightningRidgeEXECB3

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __STATICSKUDATADXELIGHTNINGRIDGEEXECB3_H__
#define __STATICSKUDATADXELIGHTNINGRIDGEEXECB3_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
DebugReport(
  VOID
);

EFI_STATUS
EFIAPI
ReadUnaligned64(
  VOID
);

EFI_STATUS
EFIAPI
CompareHobGuid(
  VOID
);

EFI_STATUS
EFIAPI
DebugWrite(
  VOID
);

EFI_STATUS
EFIAPI
ModuleEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
GUIDs(
  VOID
);

EFI_STATUS
EFIAPI
CONST EFI_GUID  mPlatformProtocolGuid =(
  VOID
);

EFI_STATUS
EFIAPI
// -------------------------------------------------------------------------(
  VOID
);

EFI_STATUS
EFIAPI
gImageHandle      = NULL;  ///< Offset 0xF550(
  VOID
);

EFI_STATUS
EFIAPI
Assertion Strings  (offset 0x780 - 0x3F00)(
  VOID
);

EFI_STATUS
EFIAPI
CONST CHAR8  mAssertEfiError[]       = "\nASSERT_EFI_ERROR (Status = %r)\n";(
  VOID
);

EFI_STATUS
EFIAPI
namespace method names for SKU data access(
  VOID
);

EFI_STATUS
EFIAPI
CONST CHAR8  mAcpiNameCCT0[] = "_SB_.CCT0";(
  VOID
);

EFI_STATUS
EFIAPI
Data Section Layout  (0x4080 - 0xF580)(
  VOID
);

EFI_STATUS
EFIAPI
.data section contains the platform HOB descriptor block followed(
  VOID
);

EFI_STATUS
EFIAPI
the UMPT config table, UMPT data entries, PIRQ routing, core family(
  VOID
);

EFI_STATUS
EFIAPI
HOB descriptor at 0x40A0.(
  VOID
);

EFI_STATUS
EFIAPI
protocol GUID, tag 'PIRQ', version, PIRQ data ptr(
  VOID
);

EFI_STATUS
EFIAPI
processor GUID, NULL sentinel, size.(
  VOID
);

EFI_STATUS
EFIAPI
CONST struct {(
  VOID
);

EFI_STATUS
EFIAPI
configuration table at 0x9040.(
  VOID
);

EFI_STATUS
EFIAPI
entry: { UINT64 DataOffset, UINT64 DataSize }(
  VOID
);

EFI_STATUS
EFIAPI
CONST TABLE_DESCRIPTOR  mUmptConfigTable[] = {(
  VOID
);

EFI_STATUS
EFIAPI
memory topology (59 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
interrupt routing (211 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
core/thread map (25 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
sentinel (2 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
data entries at 0x9060.(
  VOID
);

EFI_STATUS
EFIAPI
CONST TABLE_DESCRIPTOR  mUmptDataTable[] = {(
  VOID
);

EFI_STATUS
EFIAPI
core topology map(
  VOID
);

EFI_STATUS
EFIAPI
sentinel(
  VOID
);

EFI_STATUS
EFIAPI
Family Hierarchy (CFH)(
  VOID
);

EFI_STATUS
EFIAPI
Configuration Table (CCT)(
  VOID
);

EFI_STATUS
EFIAPI
Processor Data block at 0x9020.(
  VOID
);

EFI_STATUS
EFIAPI
data table header at 0x40D8.(
  VOID
);

EFI_STATUS
EFIAPI
socket topology data at 0xD690 (59+ bytes).(
  VOID
);

EFI_STATUS
EFIAPI
SubType; UINT8 ChannelMap[3]; UINT8 Reserved2[3] }(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mSocketMemoryTopology[] = {(
  VOID
);

EFI_STATUS
EFIAPI
0, DDR5 (Type=0x0A), channels [4,5,6] (A/B/C)(
  VOID
);

EFI_STATUS
EFIAPI
1, Type=0x0B, channels rotated(
  VOID
);

EFI_STATUS
EFIAPI
2, Type=0x0C(
  VOID
);

EFI_STATUS
EFIAPI
3, Type=0x0D(
  VOID
);

EFI_STATUS
EFIAPI
4, Type=0x0E(
  VOID
);

EFI_STATUS
EFIAPI
5, Type=0x0F(
  VOID
);

EFI_STATUS
EFIAPI
6, Type=0x10(
  VOID
);

EFI_STATUS
EFIAPI
core/thread topology at 0x9110 (25 bytes).(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mSocketCoreTopology[] = {(
  VOID
);

EFI_STATUS
EFIAPI
0, APIC base 0xFEC00000(
  VOID
);

EFI_STATUS
EFIAPI
0x20, count=9(
  VOID
);

EFI_STATUS
EFIAPI
1, APIC base 0xFEC08000,...(
  VOID
);

EFI_STATUS
EFIAPI
interrupt routing data at 0xC2C0 (211 bytes).(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mIoApicRoutingData[] = {(
  VOID
);

EFI_STATUS
EFIAPI
0: flags=0xFF, ioapic=0x00, intin=0x09, dev=0x07(
  VOID
);

EFI_STATUS
EFIAPI
Family Hierarchy at 0xDB60 (275 bytes).(
  VOID
);

EFI_STATUS
EFIAPI
Flags, UINT8 ApicId, UINT16 Reserved2, UINT32 Caps}(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mCoreFamilyHierarchy[] = {(
  VOID
);

EFI_STATUS
EFIAPI
0-10, each with type 0x1F (standard core)(
  VOID
);

EFI_STATUS
EFIAPI
1: ApicId=1(
  VOID
);

EFI_STATUS
EFIAPI
2: ApicId=2(
  VOID
);

EFI_STATUS
EFIAPI
3: ApicId=3(
  VOID
);

EFI_STATUS
EFIAPI
4: ApicId=4(
  VOID
);

EFI_STATUS
EFIAPI
5: ApicId=5(
  VOID
);

EFI_STATUS
EFIAPI
6: ApicId=6(
  VOID
);

EFI_STATUS
EFIAPI
7: ApicId=7(
  VOID
);

EFI_STATUS
EFIAPI
8: ApicId=8, caps=1(
  VOID
);

EFI_STATUS
EFIAPI
9: ApicId=9(
  VOID
);

EFI_STATUS
EFIAPI
A: ApicId=0xA(
  VOID
);

EFI_STATUS
EFIAPI
Configuration Table (CCT) at 0xBD80 (67 bytes).(
  VOID
);

EFI_STATUS
EFIAPI
Flags, UINT8 ApicCluster, UINT8 CoreMap[4](
  VOID
);

EFI_STATUS
EFIAPI
Reserved2}(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mCoreConfigTable[] = {(
  VOID
);

EFI_STATUS
EFIAPI
0, 4-way interleave: cores [16,17,18,19](
  VOID
);

EFI_STATUS
EFIAPI
1, rotated: [17,18,19,16](
  VOID
);

EFI_STATUS
EFIAPI
2, rotated: [18,19,16,17](
  VOID
);

EFI_STATUS
EFIAPI
3, rotated: [19,16,17,18](
  VOID
);

EFI_STATUS
EFIAPI
entry 1 sentinel (2 bytes) at 0xDB30.(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mConfigSentinel[] = { 0x00, 0x00 };(
  VOID
);

EFI_STATUS
EFIAPI
routing entries header at 0x90D8.(
  VOID
);

EFI_STATUS
EFIAPI
CONST TABLE_DESCRIPTOR  mPirqDataEntries[] = {(
  VOID
);

EFI_STATUS
EFIAPI
entry 0: 7 bytes header(
  VOID
);

EFI_STATUS
EFIAPI
entry 1(
  VOID
);

EFI_STATUS
EFIAPI
entry 2: large routing table(
  VOID
);

EFI_STATUS
EFIAPI
};(
  VOID
);

EFI_STATUS
EFIAPI
routing entry at 0xBD70 (7 bytes header).(
  VOID
);

EFI_STATUS
EFIAPI
CONST UINT8  mPirqRoutingHeader[] = {(
  VOID
);

EFI_STATUS
EFIAPI
Functions(
  VOID
);

EFI_STATUS
EFIAPI
function at offset +8: DebugReport(file, line, desc)(
  VOID
);

EFI_STATUS
EFIAPI
= *(UINT64 (**)(CONST CHAR8 *, UINTN, CONST CHAR8 *))((
  VOID
);

EFI_STATUS
EFIAPI
the system configuration table.(
  VOID
);

EFI_STATUS
EFIAPI
+ 104 = NumberOfTableEntries (offset 0x68 in EFI_SYSTEM_TABLE)(
  VOID
);

EFI_STATUS
EFIAPI
+ 112 = ConfigurationTable  (offset 0x70)(
  VOID
);

EFI_STATUS
EFIAPI
= *(UINTN *)((UINT8 *)gST + 104);(
  VOID
);

EFI_STATUS
EFIAPI
-- the data pointer is at offset +16 in the table entry.(
  VOID
);

EFI_STATUS
EFIAPI
= *(VOID **)((UINT8 *)TableEntry + 16);(
  VOID
);

EFI_STATUS
EFIAPI
CMOS register to determine debug verbosity.(
  VOID
);

EFI_STATUS
EFIAPI
register 0x70, data register 0x71.(
  VOID
);

EFI_STATUS
EFIAPI
= __inbyte (0x70);(
  VOID
);

EFI_STATUS
EFIAPI
debug level from platform-specific memory location.(
  VOID
);

EFI_STATUS
EFIAPI
= (*(volatile UINT8 *)0xFDAF0490 & 2) | 1;(
  VOID
);

EFI_STATUS
EFIAPI
} else {(
  VOID
);

EFI_STATUS
EFIAPI
}(
  VOID
);

EFI_STATUS
EFIAPI
Point(
  VOID
);

EFI_STATUS
EFIAPI
global UEFI handles for library-style access.(
  VOID
);

EFI_STATUS
EFIAPI
= ImageHandle;(
  VOID
);

EFI_STATUS
EFIAPI
the platform protocol and HOB list.(
  VOID
);

EFI_STATUS
EFIAPI
(ImageHandle);(
  VOID
);

EFI_STATUS
EFIAPI
the platform protocol interface.(
  VOID
);

EFI_STATUS
EFIAPI
= gBS->LocateProtocol ((
  VOID
);

EFI_STATUS
EFIAPI
static SKU data protocol.(
  VOID
);

EFI_STATUS
EFIAPI
GUID: 0FF8A1CF-A0AB-4AC0-BFC9-34A78F68DD8A(
  VOID
);

EFI_STATUS
EFIAPI
function at offset +16 in the protocol interface.(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT64 (*)(VOID *, VOID *, VOID *, UINT64))((
  VOID
);

EFI_STATUS
EFIAPI
the Static SKU Data protocol with PIRQ routing info.(
  VOID
);

EFI_STATUS
EFIAPI
= (EFI_STATUS)InstallTableFunc ((
  VOID
);

EFI_STATUS
EFIAPI
the PIRQ routing data table.(
  VOID
);

EFI_STATUS
EFIAPI
the ACPI processor info table.(
  VOID
);

#endif /* __STATICSKUDATADXELIGHTNINGRIDGEEXECB3_H__ */