| Address | Name | Description | |
|---|---|---|---|
| UsbOcUpdateCallback | |||
| UsbOcUpdateGetPchStepping | |||
| MmPciRead16 | |||
| ReadUnaligned64 | |||
| CompareGuid | |||
| EfiGetSystemConfigurationTable | |||
| ModuleEntryPoint | |||
| Global | Variables | ||
| EFI_HANDLE | gImageHandle = NULL; | ||
| USB | OC Protocol GUIDs | ||
| EFI_GUID | gEfiUsbOcUpdateProtocolGuid = USB_OC_UPDATE_PROTOCOL_GUID; | ||
| Forward | function declarations | ||
| EFI_STATUS | UsbOcUpdateCallback ( | ||
| Check | if already retrieved | ||
| if | (gMpciUsra != NULL) { | ||
| Locate | the MM PCI Base protocol | ||
| Status | = gBootServices->LocateProtocol ( | ||
| Use | cached value if already computed | ||
| if | (gPchStepping != PCH_STEPPING_UNKNOWN) { | ||
| Get | the MM PCI User Space Register Area | ||
| Usra | = GetMpciUsra (); | ||
| Read | the LPC device DID (Device ID) register at offset 0x2 | ||
| DidValue | = MmPciRead16 ((UINTN)Usra + 2); | ||
| Decode | the PCH stepping from the DID | ||
| if | **((DidValue == 0xA13F) | ** | |
| Mainstream | stepping set (0xA13F base): | ||
| Read | SUBVID from offset 0x2C to distinguish A0/A1/B0/B1 | ||
| SubVid | = 0; | ||
| Read | SUBVID at MM PCI offset 0x2C | ||
| SubVid | = MmPciRead16 ((UINTN)Usra + 0x2C); | ||
| DMI | Virtual Channel table entry 0 => A0 stepping | ||
| gPchStepping | = PCH_STEPPING_A0; | ||
| DMI | Virtual Channel table entry 1 => A1 stepping | ||
| gPchStepping | = PCH_STEPPING_A1; | ||
| DMI | Virtual Channel table entry 2 => B0 stepping | ||
| gPchStepping | = PCH_STEPPING_B0; | ||
| DMI | Virtual Channel table entry 3 => B1 stepping | ||
| gPchStepping | = PCH_STEPPING_B1; | ||
| Fall | through to extended stepping decode | ||
| If | we resolved to a known stepping via SUBVID, cache and return | ||
| Extended | stepping range for B2/C0/C1: | ||
| DID | plus 0x62A0 -> 0x62A8 range indicates B2/C stepping | ||
| if | ((DidValue + 0x62A0) <= 8) { | ||
| B2 | = 35, B3 = 36, C0 = 37, C1 = 38 | ||
| if | (Revision == 0x10) { | ||
| Alternate | DID (0xA14C) — check revision for stepping decode | ||
| Revision | = (UINT8 )((UINTN)Usra + 8); | ||
| PCD | indicates Server platform: stepping = D0 | ||
| No | further decode needed | ||
| gPchStepping | = PCH_STEPPING_D0; | ||
| Not | Server platform: stepping depends on revision | ||
| switch | (Revision) { | ||
| Unknown | DID — stepping not recognized | ||
| gPchStepping | = PCH_STEPPING_UNKNOWN; | ||
| Choose | OC table based on stepping | ||
| Stepping | >= 48 (D0 and above) uses 48-pin OC mapping | ||
| All | others use default 54-pin mapping | ||
| if | (Stepping >= PCH_STEPPING_D0) { | ||
| Populate | output structures | ||
| The | actual OC table data is provided by the UBA base protocol | ||
| dispatch | layer. | ||
| Initialize | library services | ||
| ProcessLibraryConstructorList | (ImageHandle, SystemTable); | ||
| Log | the driver entry | ||
| DEBUG | ((DEBUG_INFO, "UBA:UsbOcUpdate-TypeClx64L\n")); | ||
| Locate | the UBA USB OC Update protocol | ||
| Register | the USB OC mapping callback | ||
| Status | = UsbOcProtocol->GetUsbOcMapping ( |
Generated by HR650X BIOS Decompilation Project