# PcieErrorHandler
**Index:** 0224 | **Size:** 50,656 bytes (202,624 body) | **Phase:** SMM

## Overview
SMM PCI Express error handler for the Intel Purley platform. Manages PCIe Advanced Error Reporting (AER), PCIe component/device error detection and logging, and root port error handling. Initializes through AutoGen library constructors then registers SMM error handling callbacks for PCIe bus error events. Interfaces with the platform RAS infrastructure to log PCIe errors and communicate with BMC.

## Key Functions
- **ModuleEntryPoint** -- SMM entry point: initializes PCIe handlers with recovered entry-flow helpers.
- **PcieErrorHandlerInitLibraries** -- Recovered constructor/bootstrap helper: initializes library globals (`gST`, `gBS`, `gRT`, `gSmst`).
- **RegisterPcieErrorHandler** -- Main initialization routine: locates PCIe-related protocols and registers SMI handlers.
- **PcieErrorHandlerInitFailure** -- Initialization failure fallback helper for cleanup/error-path handling.

## Recovered Symbol Mapping
- `0x7958` -> `PcieErrorHandlerInitLibraries`
- `0x7E70` -> `RegisterPcieErrorHandler`
- `0x7E00` -> `PcieErrorHandlerInitFailure`

## Module/File Split Notes
- `PcieErrorHandler.c` currently contains only `ModuleEntryPoint` and the recovered call-chain to the two helper routines.
- `PcieErrorHandler.h` declares the recovered public entry and helper symbols.
- `PcieErrorHandler.md` documents the recovered symbol mapping and function-level recovery intent.

## Protocols/Dependencies
- UEFI Boot Services, Runtime Services, SMM System Table (gSmst)
- EFI_SMM_BASE2_PROTOCOL, EFI_SMM_SW_DISPATCH2_PROTOCOL
- IIO Protocol, MM PCI Base Protocol for PCIe config space access

## Platform
Intel Purley (Skylake-SP Xeon), HR650X
Source: PurleyPlatPkg/Ras/Smm/ErrHandling/PcieErrorHandler/