# IioInit

## Function Table

| Address | Name | Description |
|---------|------|-------------|
|  | **IioInitAssert** |  |
|  | **IioInitGetMmPciBaseProtocol** |  |
|  | **IioInitGetStackProtocol** |  |
|  | **IioInitBreakpoint** | Generates breakpoint trap (INT 3) |
|  | **IioInitHalt** | No-op wait loop (PAUSE/HLT hint) |
|  | **IioInitStackTrace** | Call stack back trace (TRAP) |
|  | **IioInitEnableInterrupts** | Enable interrupts (STI) |
|  | **IioInitDisableInterrupts** | Disable interrupts (CLI) |
|  | **IioInitReadEflags** | Read the RFLAGS register |
|  | **IioInitDebugAssert** | Debug assertion handler |
|  | **IioInitAssertDeadLoop** | Dead-loop assertion handler |
|  | **IioInitCore** | IIO driver entry logic |
|  | **IioInitS3BootScriptLabel** | Save S3 boot script label entries |
|  | **IioInitS3BootScriptPciCfg** | Write S3 boot script PCIe entries |
|  | **IioInitIoatInit** | IOAT / VT-d initialization |
|  | **IioInitPciePortConfig** | PCIe hot-plug and link config |
|  | **IioInitExitBootServices** | ExitBootServices notification callback |
|  | **IioInitCheckVgaPresent** | Check if VGA is present on socket/port |
|  | **IioInitReadyToBoot** | ReadyToBoot notification callback |
|  | **IioInitLateSecurePlatform** | Late secure platform (TXT) handler |
|  | **IioInitIoPortRead32** | IO-port read double-word (32-bit) |
|  | **IioInitReadUnaligned64** | Read unaligned 64-bit value |
|  | **IioInitRShiftU64** | 64-bit right shift |
|  | **IioInitLShiftU64** | 64-bit left shift |
|  | **IioInitValidatePcieAccess** | Validate PCIe memory access params |
|  | **IioInitMmioRead** | Read MMIO into buffer |
|  | **IioInitMmioWrite** | Write buffer into MMIO |
|  | **IioInitPcieMmioRead** | MMIO read with element size decode |
|  | **IioInitInitMmcfgTable** | Initialize PCIe MMCFG table |
|  | **IioInitGetMmcfgBaseAddress** | Resolve MMCFG base address |
|  | **ModuleEntryPoint** |  |
| Global | **EFI protocol pointers** |  |
| EFI_HANDLE | **ImageHandle     = NULL;** |  |
| Global | **IIO data** |  |
| UINT8 | **byte_DD59  = 0;          // S3 boot script flag** |  |
| PCD | **token for PcdIioRevision** |  |
| PCD | **token for PcdIioPostInitDone** |  |
| Boot | **script label pointer** |  |
| Boot | **script label entry** |  |
| MCFG | **table** |  |
| Access | **width/stride table: byte pairs of (element_size, stride_size) for** |  |
| access | **widths 0..3, plus two more entries at +16 for the receive stride.** |  |
| UINT8 | **byte_A7C0[32] = { 0 };** |  |
| GUID | **definitions for IIO protocols** |  |
| EFI_GUID | **gIioStackProtocolGuid  = { 0x0 };  // unk_AA70 - IIO Stack Protocol** |  |
| unk_AAB0 | **- MM PCIe Base Protocol** |  |
| unk_AAE0 | **- PCD Protocol** |  |
| Forward | **declarations of static helper functions** |  |
| STATIC | **VOID** |  |
| ASSERT | **/ Debug helper** |  |
| IIO | **initialization core (entry logic)** |  |
| Save | **image handle and system table globally** |  |
| ImageHandle | **= ImageHandleParam;** |  |
| Get | **boot services and runtime services tables** |  |
| BootServices | **= SystemTable->BootServices;** |  |
| Locate | **the DxeServicesTable (gDS)** |  |
| Status | **= gBS->LocateProtocol (&gDxeServicesTableGuid** |  |
| AutoGen | **initialization** |  |
| if | **(EFI_ERROR (Status)) {** |  |
| Locate | **the MM PCIe Base protocol** |  |
| if | **(mPciUsra == NULL) {** |  |
| IioPlatformEarlyInit | **();** |  |
| Get | **PCD interface and read IIO revision token** |  |
| PcdInterface | **= (UINT64)GetPcdProtocol ();** |  |
| Check | **IIO revision and optionally fix up IioRevision** |  |
| IioRevision | **= (UINT8 *)PcdGetPtr (PcdIioRevision);** |  |
| Save | **interrupt state then call initialization routines** |  |
| Flags | **= SaveAndDisableInterrupts ();** |  |
| Wait | **loop for timestamp to advance (small delay)** |  |
| while | **(((Timestamp + 357 - (UINT32)ReadTimestamp ()) & 0x800000) == 0) {** |  |
| Restore | **interrupt state** |  |
| if | **(InterruptsEnabled) {** |  |
| Register | **protocols / call main IIO initialization chain** |  |
| Status | **= IioInitEntry ();** |  |
| Signal | **that IIO post-init is done** |  |
| IIO | **Stack access helpers** |  |
| PCD | **Protocol helper** |  |
| Boot | **script S3 support** |  |
| IOAT | **/ VT-d initialization** |  |
| PCIe | **port configuration** |  |
| Read | **current hot-plug and link status registers** |  |
| HotPlugReg | **= StackProtocol->Read (SocketIndex, 0, PCIE_HP_REG);** |  |
| Enable | **hot-plug detect on this port** |  |
| NewHotPlugReg | **= HotPlugReg | 1;** |  |
| Enable | **slot capability** |  |
| Write | **back link control registers** |  |
| NewLinkStatusReg | **= LinkStatusReg;** |  |
| Extract | **sub-class from class code register** |  |
| ClassReg | **= StackProtocol->Read (SocketIndex, StackId, PCIE_CLASS_REG);** |  |
| Configure | **IOAPIC redirection for all 8 ports** |  |
| for | **(PortIndex = 0; PortIndex < 8; PortIndex++) {** |  |
| PCIe | **MMCFG / Address library routines (from PcieCommonInitLib / PcieAddressLib)** |  |
| PCIe | **address translation (from PcieAddressLib / CpRcPkg)** |  |
| Force | **element size to 1 for access widths 4..7** |  |
| if | **(AccessWidth - 4 <= 3) {** |  |
| Check | **alignment** |  |
| ElementAlignment | **= byte_A7C0[WidthIndex];** |  |
| Check | **address range** |  |
| if | **(Count > 0) {** |  |
| Check | **buffer alignment** |  |
| Validate | **that MMCFG table fits in PCD-allocated space** |  |
| if | **(sub_CF0 () && TotalSize >= (UINTN)PcdProtocol->GetSize (6)) {** |  |
| If | **base address not provided, use PCD default** |  |
| if | **(!TableHeader->OemId && !TableHeader->Reserved) {** |  |
| Module | **Entry Point** |  |

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*Generated by HR650X BIOS Decompilation Project*