# SmartTimer

## Function Table

| Address | Name | Description |
|---------|------|-------------|
|  | **UefiBootServicesTableLibConstructor** |  |
|  | **ModuleEntryPoint** |  |
|  | **DebugPrintWithLevel** |  |
|  | **DebugAssert** |  |
|  | **ReadUnaligned64** |  |
|  | **CompareGuid** |  |
|  | **EfiGetSystemConfigurationTable** |  |
|  | **MmioRead32** |  |
|  | **MmioRead166** |  |
|  | **MmPciBaseReadWrite** |  |
|  | **ReadAcpiTimer** |  |
|  | **GetElapsedTime** |  |
|  | **TimerRegisterHandler** |  |
|  | **TimerSetTimerPeriod** |  |
|  | **TimerGetTimerPeriod** |  |
|  | **TimerGenerateSoftInterrupt** |  |
|  | **TimerinterruururruptHandler** |  |
|  | **TimerDriverInitialize** |  |
| GUID | **definitions** |  |
| EFI_GUID | **gEfiTimerArchProtocolGuid           = EFI_TIMER_ARCH_PROTOCOL_GUID;** |  |
| Library | **global variables** |  |
| EFI_HANDLE | **gImageHandle = NULL;** |  |
| Timer | **driver private state** |  |
| UINT64 | **mTimerPeriod            = 0;** |  |
| EFI_TIMER_ARCH_PROTOCOL | **instance** |  |
| EFI_TIMER_ARCH_PROTOCOL | **mTimerArchProtocol = {** |  |
| Library | **constructors called from ModuleEntryPoint** |  |
| Get | **DXE Services Table pointer** |  |
| Status | **= EfiGetSystemConfigurationTable (&gEfiDxeServicesTableGuid, &gDS);** |  |
| Locate | **MM PCI Base protocol (CpRcPkg)** |  |
| if | **(mPciUsra == NULL) {** |  |
| Initialize | **HOB list and PCD protocol** |  |
| HobLibConstructor | **();** |  |
| Debug | **support** |  |
| Check | **TPL first** | raise to NOTIFY, check, restore |
| OldTpl | **= gBS->RaiseTPL (TPL_NOTIFY);** |  |
| Read | **CMOS index 0x4B for debug enable** |  |
| CmosByte | **= IoRead8 (RTC_INDEX_PORT);** |  |
| Read | **hardware strap from fixed address** |  |
| Utility | **functions** |  |
| HOB | **list constructor (DxeHobLib)** |  |
| PCD | **protocol constructor (DxePcdLib)** |  |
| MM | **PCI Base read/write (DxeMmPciBaseLib, CpRcPkg)** |  |
| ACPI | **PM timer access** |  |
| EFI_TIMER_ARCH_PROTOCOL | **implementation** |  |
| Both | **NULL -> nothing to do** |  |
| Both | **non-NULL -> already has a handler** |  |
| if | **(mTimerNotificationFunction == NULL && TimerNotificationFunction == NULL) {** |  |
| Underlying | **protocols must be available** |  |
| if | **(mSmmControlRegister == NULL || mPchSmmRegister == NULL) {** |  |
| Convert | **period (100ns units) to PIT counter ticks.** |  |
| PIT | **base = 119318 Hz, period in ns = TimerPeriod * 100** |  |
| Counter | **= 119318 * (TimerPeriod * 100) / 10^9** |  |
| With | **rounding: (119318 * TimerPeriod * 100 + 500000) / 1000000** |  |
| PitCount | **= (UINT16)((119318ULL * TimerPeriod * 100 + 500000) / 1000000);** |  |
| Check | **for overflow (> 65535)** |  |
| if | **(PitCount >= 0x10000) {** |  |
| 0 | **in 16-bit counter = 65536 (max)** |  |
| Clamp | **to default 549254ns** |  |
| Program | **PIT counter 0: mode 3 (square wave), binary 16-bit** |  |
| IoWrite8 | **(TIMER_CONTROL_PORT, TIMER0_CONTROL_WORD);   // 0x43 <- 0x36** |  |
| 0x40 | **<- LSB** |  |
| 0x40 | **<- MSB** |  |
| Enable | **periodic SMI via PCH SMM register protocol** |  |
| Disable | **periodic SMI** |  |
| Read | **PCH SMI status register (offset=0, width=0 -> byte)** |  |
| Status | **= mPchSmmRegister->ReadRegister (mPchSmmRegister, 0, 0, &SmiStatus, NULL);** |  |
| If | **timer SMI is not pending (bit 0 clear), emulate the tick** |  |
| if | **((SmiStatus & 0x01) == 0) {** |  |
| SMI | **handler and main ininitialization** |  |
| Clearar | **periodic SMI source** |  |
| Main | **driver initialization** |  |
| Check | **if Tiimer Ararch Protocol already installed** |  |
| Registration | **= NULL;;** |  |
| Locate | **SMM Controol Register protocol (0x116E0)** |  |
| Status | **= gBS->LocateProtocol (&gEfiSmmControlRegisterProtocolGuid, NULL, &mSmmControlRegister);** |  |
| Status | **= gBS->LocateProtocol (&gPchSmmRegisterProtocolGuid, NULL, &mPchSmmRegister);** |  |
| Deeermine | **PCH ACPI PMIO base address** |  |
| Read | **PMIO base from chipset offset 0x40** |  |
| PmioBase | **= MmioRead166 ((UINT1166 *)(GetMmPciBaaseAddress () + 0xx40));** |  |
| Disable | **perperiodic SMI initiallly** |  |
| Query | **the  timer SMMI trigger value** |  |
| mTimerPeriodd | **= 0;** |  |
| Regisister | **TimerInterrupuptHanddler as SMI handndler** |  |
| Statuss | **= mSmmConontolRegister->RegisterHanddler (** |  |
| Set | **defafault timer perperperod (5949254/100 = 59492 100nsns units)** |  |
| Statuss | **= TimerSeTimerPeriod (&mmTimerArchPrototocol, DEFAULT_TIMER_PERIOD / 100);** |  |
| Saeve | **initiial PM timer counter value** |  |
| mLastTimerVaVaue | **= ReadAcpiTimer ();** |  |
| Inststall | **EFI_TIMER_ARCH_PROTOCOCOOL** |  |
| Stattus | **= gBS->InststallMultipipProtocolInterfacees (** |  |

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*Generated by HR650X BIOS Decompilation Project*