# SmbiosDataUpdateDxeLightningRidgeEXECB4

## Function Table

| Address | Name | Description |
|---------|------|-------------|
|  | **DebugPrint** |  |
|  | **DebugAssert** |  |
|  | **ReadUnaligned64** |  |
|  | **CompareGuid** |  |
|  | **SmbiosDataUpdateEntryPoint** |  |
|  | **OnAcpiProcessorIdNotify** |  |
|  | **OnSmbiosDataNotify** |  |
| Global | **UEFI system table pointers** |  |
| EFI_HANDLE | **gImageHandle   = NULL;  ///< Pointer to 0xF550** |  |
| HOB | **list pointer - cached after first retrieval** |  |
| EFI_PHYSICAL_ADDRESS | **mHobList       = 0;     ///< Pointer to 0xF568** |  |
| Debug | **protocol interface - cached after first retrieval** |  |
| VOID | ***mDebugProtocol = NULL;  ///< Pointer to 0xF560** |  |
| CMOS | **platform type register** |  |
| STATIC | **UINT8            mCmosPlatformType = 0;   ///< Pointer to 0xF570** |  |
| ACPF | **(ACPI Processor ID Mapping) table** |  |
| This | **table maps physical processor packages/cores to ACPI processor IDs.** |  |
| STATIC | **CONST ACPF_TABLE_HEADER  mAcpfTable = {** |  |
| SMBIOS | **update context table for ACPI processor ID mapping.** |  |
| Contains | **the list of data regions to update in SMBIOS.** |  |
| STATIC | **CONST SMBIOS_UPDATE_CONTEXT_TABLE  mProcIdContextTable = {** |  |
| follow | **at runtime-relative addresses 0x9040 and 0x90C8 respectively.** |  |
| These | **structures are installed via protocol notifications in the** |  |
| entry | **point.** |  |
| Return | **cached protocol if already located** |  |
| if | **(mDebugProtocol != NULL) {** |  |
| Check | **available pool size; require at least 0x10 bytes** |  |
| PoolSize | **= gBS->GetMemoryMap (&gBS->Hdr.Size, NULL, NULL, NULL, NULL);** |  |
| Locate | **the debug protocol by its GUID** |  |
| Interface | **= NULL;** |  |
| Read | **the platform type from CMOS register 0x4B** |  |
| PlatformType | **= IoRead8 (CMOS_INDEX_REGISTER);** |  |
| Filter | **messages based on platform type** |  |
| mCmosPlatformType | **= PlatformType;** |  |
| Read | **platform type from alternate location** |  |
| if | **(PlatformType == 0) {** |  |
| If | **the message mask matches the allowed output, display the message** |  |
| if | **((AllowedMask & Mask) != 0) {** |  |
| Call | **the assertion handler at protocol offset +8** |  |
| Read | **each GUID as two 64-bit halves for comparison** |  |
| Guid1FirstHalf | **= ReadUnaligned64 (Guid1);** |  |
| Return | **cached HOB list if already retrieved** |  |
| if | **(mHobList != 0) {** |  |
| Retrieve | **the HOB list pointer from the System Table** |  |
| mHobList | **= 0;** |  |
| Iterate | **through HOB entries to find the SMBIOS table HOB** |  |
| SMBIOS | **HOB not found - trigger assertion** |  |
| DEBUG | **((EFI_D_ERROR, "\nASSERT_EFI_ERROR (Status = %r)\n", EFI_NOT_FOUND));** |  |
| Return | **the SMBIOS data from the found HOB entry** |  |
| mHobList | **= *(EFI_PHYSICAL_ADDRESS *)(** |  |
| No | **HOB entries present** |  |
| Validate | **the result** |  |
| if | **(mHobList == 0) {** |  |
| Save | **and validate ImageHandle** |  |
| gImageHandle | **= ImageHandle;** |  |
| Save | **and validate SystemTable** |  |
| gST | **= SystemTable;** |  |
| Save | **and validate BootServices** |  |
| gBS | **= SystemTable->BootServices;** |  |
| Save | **and validate RuntimeServices** |  |
| gRT | **= SystemTable->RuntimeServices;** |  |
| Retrieve | **the SMBIOS HOB list** |  |
| SmbiosHob | **= GetSmbiosHobList (ImageHandle);** |  |
| Register | **protocol notification for ACPI processor ID mapping** |  |
| Installs | **a notify function to be called when the ACPI processor ID** |  |
| mapping | **protocol becomes available.** |  |
| Register | **protocol notification for SMBIOS data update** |  |
| Installs | **a notify function for the second SMBIOS data update channel.** |  |
| Status | **= gBS->RegisterProtocolNotify (** |  |
| Register | **protocol notification for the third data channel** |  |
| Installs | **a notify function for the PIRQ routing data.** |  |
| Process | **the ACPF table and update SMBIOS processor ID data.** |  |
| This | **callback handles the UMPT (Uncore Memory Protocol Table)** |  |
| protocol | **installation event.** |  |
| The | **SMBIOS data at table offset 0x9040 contains the processor** |  |
| mapping | **entries that map ACPI processor IDs to physical** |  |
| Process | **the PIRQ routing data and update SMBIOS interrupt tables.** |  |
| This | **callback handles the PIRQ protocol installation event.** |  |
| The | **PIRQ routing data at table offset 0x90C8 contains the** |  |
| interrupt | **routing entries for the LightningRidge platform.** |  |

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*Generated by HR650X BIOS Decompilation Project*