# SmmControl

## Function Table

| Address | Name | Description |
|---------|------|-------------|
|  | **SmiActivate** |  |
|  | **PciExpressInit** |  |
|  | **SmiClearGpeStatus** |  |
|  | **GetDebugLibProtocol** |  |
|  | **LocateProtocol** |  |
|  | **CompareGuid** |  |
|  | **ReadUnaligned64** |  |
|  | **GetConfigurationTable** |  |
|  | **IoRead16** |  |
|  | **IoWrite16** |  |
|  | **IoRead32** |  |
|  | **IoWrite32** |  |
|  | **MmioRead16** |  |
|  | **InitDebugLib** |  |
|  | **DebugPrint** |  |
|  | **DebugAssert** |  |
|  | **OnRestoreTpl** |  |
|  | **OnVirtualAddressChange** |  |
|  | **OnRuntimeReady** |  |
|  | **OnSmiHobCleanup** |  |
|  | **SmmCommunicationCommunicate** |  |
|  | **SmmControl2Handler** |  |
|  | **SmmControl2Clear** |  |
|  | **PchLpcMmioRead** |  |
|  | **ReadUnaligned64At8** |  |
|  | **InitHobList** |  |
|  | **InitPcdDb** |  |
|  | **InitMmPciBase** |  |
|  | **GetPcdProtocol** |  |
|  | **SmmControlDriverEntryInit** |  |
|  | **SmmControlDriverUnload** |  |
| Global | **Variables** |  |
| EFI_HANDLE | **gImageHandle       = NULL;** |  |
| psub_18AC | **EFI_SMM_COMMUNICATION_PROTOCOL *gSmmCommunication = NULL;  // psub_1970** |  |
| qword_43E0 | **VOID                    *gHobList          = NULL;   // qword_43E8** |  |
| qword_4408 | **VOID                    *gDsEntry          = NULL;   // qword_43D8** |  |
| qword_43D0 | **UINT8                   gDebugLevel        = 0;      // n113** |  |
| qword_43F0 | **UINT64                  gSmiHobDataCount   = 0;      // qword_43F8** |  |
| qword_4438 | **UINTN                   gCmCpuCount        = 0;      // n2, initialized to 2** |  |
| Event | **handles** |  |
| EFI_EVENT | **gEventRestoreTpl         = NULL;  // qword_43C0** |  |
| qword_4440 | **EFI_EVENT               gEventRuntimeReady       = NULL;  // qword_4450** |  |
| qword_43B8 | **//** |  |
| Forward | **declarations of static functions** |  |
| static | **EFI_STATUS** |  |
| Debug | **Library Protocol (dynamically located)** |  |
| Check | **if BootServices is available and we have enough memory** |  |
| if | **(gBootServices_0 != 0) {** |  |
| Low | **memory condition: try to locate the debug protocol** |  |
| Status | **= LocateProtocol (&gEfiDebugProtocolGuid, NULL, &gDebugLib);** |  |
| Read | **CMOS diagnostic register to determine current debug level** |  |
| CmosIndex | **= IoRead8 (0x70);** |  |
| Event | **Notification Callbacks** |  |
| Protocol | **Implementation** |  |
| Defer | **to the non-periodic activation path** |  |
| if | **(CommBuffer != NULL && CommSize != NULL) {** |  |
| Clear | **SMI status and trigger SMI via control port** |  |
| IoWrite32 | **(gSmiIoPortBase + 48, IoRead32 (gSmiIoPortBase + 48) | 0x21);** |  |
| Write | **SMI command and data ports** |  |
| IoWrite8 | **(0xB3, DataValue);** |  |
| SMI | **Activation and Status Handling** |  |
| Check | **TCO status; if not set, reset PM1/GPE status** |  |
| if | **((IoRead16 (gSmiIoPortBase + 4) & 1) == 0) {** |  |
| Reset | **PM1 status registers** |  |
| IoWrite16 | **(gSmiIoPortBase, 0xFFFF);** |  |
| Clear | **GPE status** |  |
| IoWrite32 | **(gSmiIoPortBase + 140, 0xFFFFFDFF);** |  |
| Enable | **all GPIO GPEs** |  |
| GpeContext | **= (PCM_PCI_SMI_CONTEXT *)GetGpioGpeInfo (&GpeCount);** |  |
| Disable | **all GPIO SMIs** |  |
| SmiContext | **= (PCM_PCI_SMI_CONTEXT *)GetGpioSmiInfo (&SmiCount);** |  |
| Disable | **GPE and SMI events on the SMI I/O port** |  |
| GpeBase | **= gSmiIoPortBase + 68;** |  |
| PCH | **Support and Detection** |  |
| Build | **a temporary MMIO address to read from LPC** |  |
| Data | **= MmioRead32 ((UINT32 *)(UINTN)Address);** |  |
| PCD | **and Protocol Location Helpers** |  |
| Configuration | **Table Lookup** |  |
| Locate | **MM_PCI_USRA protocol if needed** |  |
| if | **(gMmPciUsra == NULL) {** |  |
| Driver | **Entry Point and Initialization** |  |
| Assert | **required pointers** |  |
| ASSERT | **(gImageHandle != NULL);** |  |
| Initialize | **the PCH SMI I/O base address from the HOB** |  |
| and | **configure the SMI I/O ports** |  |
| Status | **= SmmControlDriverEntryInit ();** |  |
| Read | **LPC I/O decode registers via MMIO to get SMI port base** |  |
| IoPortBase | **= MmioRead16 ((UINT16 *)(PchLpcMmioRead (2)));** |  |
| PCH | **not initialized yet** | should not happen |
| ASSERT | **(FALSE);** |  |
| Initialize | **protocol structures** |  |
| gSmiControlAddress | **= 0;** |  |
| Register | **SMI HOB notification protocol** |  |
| Register | **EFI virtual address change event** |  |
| Status | **= gBootServices->CreateEvent (** |  |
| Initialize | **GPIO/SMI status** |  |
| SmiInitGpe | **();** |  |
| Free | **SMI HOB data if allocated** |  |
| if | **(gSmiHobData != NULL) {** |  |
| Close | **all registered events** |  |
| if | **(gEventVirtualAddrChange != NULL) {** |  |
| Free | **PciExpress protocol registration** |  |
| if | **(gPcdDb != NULL) {** |  |
| PCI | **Express Library Initialization** |  |
| Register | **for protocol notify on the MM-PCI USRA protocol** |  |

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*Generated by HR650X BIOS Decompilation Project*