# PciDxeInit

## Function Table

| Address | Name | Description |
|---------|------|-------------|
|  | **GetCurrentDebugLevel** |  |
|  | **PciDxeInitEntryPoint** |  |
|  | **PciDxeInitDriverInit** |  |
|  | **PciInitHookDispatcher** |  |
|  | **S3BootScriptLibInitialize** |  |
|  | **S3BootScriptLibDeinitialize** |  |
| Global | **Data** |  |
| EFI | **library globals** |  |
| EFI_HANDLE | **gImageHandle_Private = NULL;** |  |
| PCIe | **MMIO base address (from PCI Express Base Address PCD)** |  |
| UINT64 | **gPciExpressBase = 0;** |  |
| Protocol | **notification events** |  |
| EFI_EVENT | **gEventAmiPciBusSetupOverride = NULL;** |  |
| S3 | **boot script state** |  |
| S3_BOOT_SCRIPT_CONTEXT | ***gS3BootScriptContext = NULL;** |  |
| VGA | **state** |  |
| BOOLEAN | **gAtleastOneVideoFound = FALSE;** |  |
| SMM | **LockBox communication** |  |
| BOOLEAN | **gSmmLockBoxInitialized = FALSE;** |  |
| Setup | **variable support globals** |  |
| BOOLEAN | **gSetupVariableExists = FALSE;** |  |
| Debug | **Support** |  |
| Read | **CMOS index 0x4B (debug level register)** |  |
| IoWrite8 | **(0x70, (IoRead8 (0x70) & 0x80) | 0x4B);** |  |
| PciDxeInit | **Entry Point** |  |
| Initialize | **the driver** |  |
| PciDxeInitDriverInit | **(ImageHandle);** |  |
| Save | **EFI system table pointers (may already be set by lib constructor)** |  |
| if | **(gSystemTable == NULL) {** |  |
| Install | **the AmiPciBusSetupOverride protocol** |  |
| Handle | **= NULL;** |  |
| Driver | **Initialization** |  |
| Save | **global handles** |  |
| gImageHandle_Private | **= ImageHandle;** |  |
| Get | **DxeServicesTable** |  |
| Status | **= gBS->LocateProtocol (** |  |
| Get | **PCI Express base address PCD or locate MmPciBase protocol** |  |
| gPciExpressBase | **= PcdGet64 (PcdPciExpressBaseAddress);** |  |
| Initialize | **HOB list** |  |
| Status | **= EfiGetSystemConfigurationTable (** |  |
| Enable | **PCI config space access** |  |
| CmosFlags | **= (UINT16)AsmReadEflags ();** |  |
| Small | **delay using RDTSC (~10us)** |  |
| DelayStart | **= AsmReadTsc () & 0xFFFFFF;** |  |
| Write | **PCI configuration enable bit** |  |
| IoWrite32 | **(0xCF8, 0x80000000);** |  |
| Wait | **for enable to stabilize** |  |
| while | **((((UINT32)DelayStart + 357 - (UINT32)AsmReadTsc ()) & 0x800000) == 0) {** |  |
| Restore | **interrupt state** |  |
| if | **((CmosFlags & BIT9) != 0) {** |  |
| Initialize | **S3 boot script library** |  |
| Status | **= S3BootScriptLibInitialize ();** |  |
| Get | **PCIe segment/bus table size from PCD** |  |
| SegBusTableSize | **= PcdGetSize (PcdPcieSegBusTable);** |  |
| Allocate | **and initialize segment/bus table** |  |
| if | **(PciExpressBaseAddress != 0) {** |  |
| Read | **PCI Bus Setup Override setup variable** |  |
| Status | **= GetSetupVariableByIndex (260, 0, &SetupByte);** |  |
| Create | **readiness notification event for PCI enum** |  |
| Status | **= gBS->CreateEvent (** |  |
| PCI | **Device Common Hook Dispatcher** |  |
| Bus | ***(UINT8 *)(PciDevicePrivateData + 218),   // Device** |  |
| Function | **Entry[Index].Match.VenId** |  |
| S3 | **Boot Script Management** |  |
| Allocate | **boot script buffer** |  |
| gS3BootScriptContext | **= (S3_BOOT_SCRIPT_CONTEXT *)AllocatePages (EFI_SIZE_TO_PAGES (0x20));** |  |
| Status | **= gBS->AllocatePages (** |  |
| Create | **ReadyToLock event** |  |
| Try | **to locate SMM Communication protocol** |  |
| Allocate | **backup buffer from SMM communication buffer** |  |
| Status | **= gSmmCommunication->GetBuffer (** |  |

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*Generated by HR650X BIOS Decompilation Project*