RegAccessPeim
| Index |
Module |
Size |
Phase |
| 368 |
RegAccessPeim |
8.4 KB (8,580 B) |
PEI |
Overview
Register Access PEIM providing read/write/modify services for processor and uncore registers during the PEI phase. Handles address translation for IIO (Integrated IO), CHA, PCU, Ubox, and other CPU/internal bus registers across multiple sockets. Uses dispatch tables keyed by access width and register box type.
Key Functions
- RegAccessReadRegister: Register read via width-based dispatch table
- RegAccessWriteRegister: Register write dispatch
- RegAccessReadModify: Atomic read-modify-write (AND/OR mask)
- RegAccessGetConfigSpace: Configuration space descriptor retrieval
- Hardware topology tables (access width per box type)
Dependencies
- CpRcPkg/Universal/RegAccess framework
- IIO, CHA, PCU, Ubox register definitions
- PEI Register Access PPI GUID (
gRegAccessPpiGuid)
- Arch: IA32 (PE32)
- Image Base: 0xFFDAE9EC
- Source:
CpRcPkg/Universal/RegAccess/Pei/RegAccess.c
- SHA256:
06a6b9c070f5f34999d24c8c98445461cbdd1808d17715adaf3d12fd99313e47
- Toolchain: VS2015 DEBUG IA32