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AMI-Aptio-BIOS-Reversed / PurleyPlatPkg / Platform / Pei / FpgaPlatformInit / FpgaBbsInit / FpgaPlatformEarlyInit.md
@Ajax Dong Ajax Dong 2 days ago 9 KB Restructure the repo

FpgaPlatformEarlyInit - FPGA Platform Early Initialization PEIM

Module Information

Field Value
Module FpgaPlatformEarlyInit.efi
Index 0370
MD5 dd148413a09f7726607d0169ec593940
SHA256 419e20671d52d16d32dc5522bb485b6caf533b1f96ebca66fb8d0ed42d08ab69
Image Base 0xffdb2054
Image Size 0x2240 (8768 bytes)
Architecture IA32 (32-bit)
Entry Point ModuleEntryPoint at 0xffdb2369
Total Functions 36
Named Functions 1 (_ModuleEntryPoint)
Renamed Functions 35

Source Files (from debug strings)

  • PurleyPlatPkg/Platform/Pei/FpgaPlatformInit/FpgaPlatformEarlyInit.c - Main entry
  • PurleyPlatPkg/Platform/Pei/FpgaPlatformInit/FpgaBbsInit.c - BBS init
  • PurleyPlatPkg/Library/FpgaPlatformHooksLib/FpgaPlatformHooksLib.c - Platform hooks
  • MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c
  • MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c
  • MdePkg/Library/BaseLib/CheckSum.c
  • MdePkg/Library/BaseLib/Unaligned.c
  • MdePkg/Library/BaseLib/X86ReadIdtr.c
  • MdePkg/Library/PeiHobLib/HobLib.c
  • MdePkg/Library/PeiPcdLib/PeiPcdLib.c
  • MdePkg/Library/PeiServicesLib/PeiServicesLib.c
  • MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointer.c

Segments

Segment Start End Size Permissions
HEADER 0xffdb2054 0xffdb22b4 0x260 ---
.text 0xffdb22b4 0xffdb3494 0x11e0 rx
.rdata 0xffdb3494 0xffdb4074 0xbe0 r
.data 0xffdb4074 0xffdb4174 0x100 rw
.reloc 0xffdb4174 0xffdb4294 0x120 r
GAP 0xffdb4294 0xffdb5054 0xdc0 rw

Function Map

FPGA Platform-Specific Functions

Address Name Size Description
0xffdb2369 ModuleEntryPoint 0x49f PEIM entry point - locates PPI, reads config, dispatches BBS init
0xffdb2808 FpgaBbsInit 0x142 BBS init - loads FPGA FV from BIOS flash, validates, installs PPI
0xffdb2d87 FpgaInstallFvInfoPpi 0x110 Install FV info PPI for PEI firmware volume discovery
0xffdb2e97 FpgaGetHssiCardId 0x7b Get FPGA HSSI card ID via platform hooks PPI
0xffdb2f12 FpgaGetPlatformInfo 0x86 Get socket present and platform type via hooks PPI
0xffdb2f98 FpgaGetConfigHob 0x14b Find or create FPGA config HOB
0xffdb30e3 FpgaConfigSetHobValues 0xa7 Write FPGA config data to HOB
0xffdb318a FpgaConfigGetHobValues 0xab Read FPGA config data from HOB
0xffdb3235 FpgaBuildConfigHob 0x4b Create a new FPGA config HOB entry
0xffdb3280 FpgaGetConfigVariable 0x72 Read FPGA socket config from UEFI variable

HOB Library (PEI)

Address Name Size Description
0xffdb2b55 GetHobList 0x6e Get HOB list pointer from PEI services
0xffdb2bc3 GetNextHobByType 0x45 Find next HOB of type 4 (Resource Descriptor)
0xffdb2c08 GetHobByType 0x55 Get HOB by type and length
0xffdb2caf BuildFvHob 0x5f Build firmware volume HOB
0xffdb2c5d InternalFvAlignmentCheck 0x52 Verify FV alignment

PEI Services / PPI Access

Address Name Size Description
0xffdb2d0e InternalGetReportStatusCodeProtocol 0x31 Get ReportStatusCode protocol/PPI
0xffdb2d3f FpgaReportStatusCode 0x2a Report status code with formatted message
0xffdb2d69 FpgaReportStatusCodeAssert 0x1e Report status code assertion (file:line)
0xffdb294a PeiAllocatePool 0x2a Allocate pool from PEI services
0xffdb2974 PeiAllocateZeroPool 0x18 Allocate and zero-initialize pool
0xffdb2afd PeiGetPcdProtocol 0x58 Get PCD PPI protocol
0xffdb3430 InternalGetPeiServices 0x32 Get PEI Services Table pointer via IDTR
0xffdb3462 InternalReadIdtr 0x23 Read IDTR (SIDT instruction)

Internal Library Functions

Address Name Size Description
0xffdb22b4 InternalCopyMemBackward 0x3f Memory copy with backward overlap support
0xffdb22f4 InternalZeroMem 0x20 Zero memory (memset to 0)
0xffdb2314 InternalSetMem 0x15 Set memory to value
0xffdb2334 InternalSetMem32 0x1f Set DWORD pair array
0xffdb2354 InternalZeroMem32 0x15 Fill with DWORD value
0xffdb298c InternalCopyMem 0x6f Copy memory with bounds checking
0xffdb29fb InternalZeroMemWithCheck 0x5b Zero memory with bounds checking
0xffdb2a56 InternalCalculateCheckSum16 0xa7 16-bit checksum calculation
0xffdb32f2 InternalReadCmosByte 0x4f Read CMOS/RTC byte for state detection
0xffdb33d0 InternalReadUnaligned64 0x2c Read 64-bit from potentially unaligned address
0xffdb33fc InternalWriteUnaligned64 0x34 Write 64-bit to potentially unaligned address
0xffdb3341 CopyGuid 0x30 Copy 16-byte GUID
0xffdb3371 CompareGuid 0x5f Compare two GUIDs

GUIDs Used (in .data section)

Address Likely Name Usage
0xffdb4074 gFpgaPlatformVariableGuid Vendor GUID for UEFI variable access
0xffdb4084 gEfiStatusCodeProtocolGuid Report status code protocol
0xffdb4094 gEfiPeiBootInRecoveryBootModePpiGuid Boot mode PPI for FV loading
0xffdb40a4 gFpgaSocketConfigVarGuid Variable namespace for socket config
0xffdb40c4 gEfiPeiMpServicesPpiGuid MP services PPI
0xffdb40d4 gEfiFirmwareFileSystem2Guid FFS2 GUID
0xffdb40e4 gEfiPeiMrcHooksChipServicesPpiGuid MRC hooks chip services PPI
0xffdb40f4 gEfiPeiFvInfoPpiGuid FV info PPI GUID
0xffdb4104 gFpgaPlatformHooksPpiGuid FPGA platform hooks PPI
0xffdb4114 gFpgaPlatformConfigHobGuid FPGA config HOB GUID
0xffdb4124 gEfiPeiPcdPpiGuid PCD PPI GUID

FPGA Configuration HOB Layout (38 bytes)

Based on FpgaGetConfigHob, FpgaConfigGetHobValues, and FpgaConfigSetHobValues:

Offset Size Description
0 1 Valid flag (0=invalid, 1=valid)
1 4 Reserved/pad (cleared to 0)
5 2 Socket presence bitmask (0xFF00 = default)
7 4 Socket BBS indices (4 sockets, byte each)
15 4 Socket HSSI card IDs (4 sockets, byte each)
19 4 Socket present flags (4 sockets, byte each)
23 4 Socket configuration (4 sockets, byte each)
27 4 Socket BBS GUID index (4 sockets, byte each)
31 2 Reserved/flags
33 4 Socket configuration (4 sockets, byte each)
37 1 Additional flag

Flow Diagram

ModuleEntryPoint()

  +-- FpgaReportStatusCode("Entry")
  +-- FpgaConfigGetHobValues()  -- read socket config from HOB
     +-- FpgaGetConfigHob()
     |     +-- GetHobList()
     |     +-- GetNextHobByType() -- search for FPGA config HOB by GUID
     |     +-- [if not found]: FpgaBuildConfigHob()
     |     |     +-- GetHobByType(4, 62)
     |     |     +-- CopyGuid()
     |     |     +-- InternalCopyMem()
     |     +-- [if variable exists]: FpgaGetConfigVariable()
     |           +-- PeiAllocateZeroPool()
     |           +-- PeiGetPcdProtocol()/GetVariable()
     +-- Copy data from HOB to local buffer

  +-- Locate gEfiPeiMrcHooksChipServicesPpiGuid
     [success] --> Locate gEfiPeiMpServicesPpiGuid
                   |     +-- PeiGetPcdProtocol() -> PcdGet(12)
                   +-- JUMP to BBS init path

  +-- [if MRC failure] --> FpgaReportStatusCode / ASSERT
  +-- [if no socket present] --> EFI_NOT_FOUND

BBS Init path (via ModuleEntryPoint):
  FpgaBbsInit()
    +-- FpgaReportStatusCode()
    +-- Locate gEfiPeiBootInRecoveryBootModePpiGuid
    +-- Allocate memory (type 3, 0x2000 bytes)
    +-- Load FV from BIOS offset (0xA00000 = 10MB)
     (calls gEfiPeiBootInRecoveryBootModePpi->LoadFvImage)
    +-- Verify FV signature (0x48534646 = "FSFH")
    +-- InternalCalculateCheckSum16() -- verify checksum
    +-- FpgaInstallFvInfoPpi() -- register FV with PEI
     +-- PeiAllocatePool()
     +-- CopyGuid() with gEfiFirmwareFileSystem2Guid
     +-- Install PPI via PeiServices->InstallPpi()
    +-- BuildFvHob() -- register FV in HOB database

Key Observations

  1. Socket configuration: The module manages configuration for up to 4 CPU sockets, tracking socket presence, BBS indices, HSSI card IDs, and platform types.

  2. FPGA FV loading: FpgaBbsInit loads a firmware volume from flash (offset 0xA00000 = 10MB into SPI flash), validates its signature and checksum, then registers it with the PEI infrastructure so other modules can discover it.

  3. Dual PPI paths: The entry point first tries MRC Hooks Chip Services PPI. If successful, it also looks for Mp Services PPI. If MRC hooks fail, it asserts and returns unsupported.

  4. HOBO-based config: The FPGA configuration is HOB-backed (created during PEI phase and passed to DXE phase). The module creates the HOB if it doesn't exist, initializing from UEFI variable "FpgaSocketConfig" if available.

  5. Inline memory/string lib: Many BaseMemoryLib functions are inlined from MdePkg, indicating this is a minimal-dependency PEIM that doesn't link against the full BaseMemoryLib.