/** @file
  CpuCsrAccessSMM.h -- Header for CpuCsrAccessSMM

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __CPUCSRACCESSSMM_H__
#define __CPUCSRACCESSSMM_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
IoRead32(
  VOID
);

EFI_STATUS
EFIAPI
UsraRead(
  VOID
);

EFI_STATUS
EFIAPI
UsraWrite(
  VOID
);

EFI_STATUS
EFIAPI
UsraWriteCmdOnly(
  VOID
);

EFI_STATUS
EFIAPI
MmioRead(
  VOID
);

EFI_STATUS
EFIAPI
MmioWrite(
  VOID
);

EFI_STATUS
EFIAPI
PcuMailboxCmd(
  VOID
);

EFI_STATUS
EFIAPI
VcuMailboxCmd(
  VOID
);

EFI_STATUS
EFIAPI
CpuCsrConfigInit(
  VOID
);

EFI_STATUS
EFIAPI
GetSocketConfig(
  VOID
);

EFI_STATUS
EFIAPI
CpuCsrAccessSmmHandler(
  VOID
);

EFI_STATUS
EFIAPI
CpuCsrAccessSmmEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
SMM driver provides a protocol-based interface for accessing CPU(
  VOID
);

EFI_STATUS
EFIAPI
Control and Status Registers (CSRs), PCIe configuration space(
  VOID
);

EFI_STATUS
EFIAPI
PCU/VCU mailbox registers across sockets on the Purley platform.(
  VOID
);

EFI_STATUS
EFIAPI
driver exports 12 handler functions through a dispatch table registered(
  VOID
);

EFI_STATUS
EFIAPI
SmiHandlerRegister. The dispatch is indexed by sub-command:(
  VOID
);

EFI_STATUS
EFIAPI
internal function (sub_DA4) reloads per-socket config data from the(
  VOID
);

EFI_STATUS
EFIAPI
SysHost structure during initialization.(
  VOID
);

EFI_STATUS
EFIAPI
// ------------------------------------------------------------------------(
  VOID
);

EFI_STATUS
EFIAPI
handler: {0067835F-9A50-433A-8CBB-852078197814}(
  VOID
);

EFI_STATUS
EFIAPI
protocol (CpRcPkg): {FD480A76-B134-4EF7-ADFE-B0E054639807}(
  VOID
);

EFI_STATUS
EFIAPI
RootBridge: {A7CED760-C71C-4E1A-ACB1-89604D5216CB}(
  VOID
);

EFI_STATUS
EFIAPI
Variables (.data segment)(
  VOID
);

EFI_STATUS
EFIAPI
VOID    *gSmmCsrProtocol;                // 0x4188(
  VOID
);

EFI_STATUS
EFIAPI
UINT8   *gCsrConfigCache;                // 0x4198(
  VOID
);

EFI_STATUS
EFIAPI
EFI_BOOT_SERVICES       *gBS;            // 0x41A8(
  VOID
);

EFI_STATUS
EFIAPI
EFI_RUNTIME_SERVICES    *gRT;            // 0x41B8(
  VOID
);

EFI_STATUS
EFIAPI
VOID                    *gSmmStatusCode; // 0x41C8(
  VOID
);

EFI_STATUS
EFIAPI
VOID                    *gHobList;       // 0x41D8(
  VOID
);

EFI_STATUS
EFIAPI
VOID                    *gPcd;           // 0x41E8(
  VOID
);

EFI_STATUS
EFIAPI
UINT64  *gCsrData;                       // 0x4308(
  VOID
);

EFI_STATUS
EFIAPI
UINT64  *gSmramRanges;                   // 0x4318(
  VOID
);

EFI_STATUS
EFIAPI
// Per-socket config cache(
  VOID
);

EFI_STATUS
EFIAPI
UINT8   gSocketChaMap[24];               // 0x4344(
  VOID
);

EFI_STATUS
EFIAPI
UINT8   gSocketData2[4];                 // 0x4364(
  VOID
);

EFI_STATUS
EFIAPI
UINT8   gCpuType;                        // 0x436C(
  VOID
);

EFI_STATUS
EFIAPI
UINT32  gSocketEnableMask;               // 0x436E(
  VOID
);

EFI_STATUS
EFIAPI
UINT32  gMmioBaseShift;                  // 0x4376(
  VOID
);

EFI_STATUS
EFIAPI
UINT8   gSocketChPerInst[24];            // 0x4385(
  VOID
);

EFI_STATUS
EFIAPI
UINT32  gLastCheckpointCode;             // 0x4410(
  VOID
);

EFI_STATUS
EFIAPI
wrappers(
  VOID
);

EFI_STATUS
EFIAPI
address translation(
  VOID
);

EFI_STATUS
EFIAPI
helpers(
  VOID
);

EFI_STATUS
EFIAPI
routing (sub_20A4)(
  VOID
);

EFI_STATUS
EFIAPI
handler dispatch entry(
  VOID
);

#endif /* __CPUCSRACCESSSMM_H__ */