/** @file
  CrystalRidgeSMM.h -- Header for CrystalRidgeSMM

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __CRYSTALRIDGESMM_H__
#define __CRYSTALRIDGESMM_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
CrystalRidgeDebugAssert(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeEfiError(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeDebugEnabled(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeZeroMem(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeStatusToCategory(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeSmmEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeInitServiceTablePointers(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeSmmDriverInit(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeInitDimmDb(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeConfigureSmi(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeTranslateAddress(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeMailboxCommand(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeNfitBuild(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeSetupProtocol(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeFlushNearMemoryInit(
  VOID
);

EFI_STATUS
EFIAPI
(reconstructed from .data section at 0x29600-0xAE580)(
  VOID
);

EFI_STATUS
EFIAPI
UINT8               gCrIsSmmOnly            = 0;          // byte_29CB0(
  VOID
);

EFI_STATUS
EFIAPI
UINT64              gCrCacheLineSizeMul     = 0;          // qword_29EC0(
  VOID
);

EFI_STATUS
EFIAPI
VOID                *gCrNfit                = NULL;        // qword_29CA8(
  VOID
);

EFI_STATUS
EFIAPI
VOID                *gCrProtocol1           = NULL;        // qword_29CD0(
  VOID
);

EFI_STATUS
EFIAPI
CR_DIMM_ENTRY       gCrDimmDbFallback;                    // unk_AC2E8(
  VOID
);

EFI_STATUS
EFIAPI
UINT32              gCrXlateTable[6]        = {0};        // dword_6F6E0(
  VOID
);

EFI_STATUS
EFIAPI
CR_CONTROL_REGION   gCrControlRegions[CR_MAX_CONTROL_REGIONS];  // qword_AE028(
  VOID
);

EFI_STATUS
EFIAPI
in sub_67D4(
  VOID
);

EFI_STATUS
EFIAPI
Helpers(
  VOID
);

EFI_STATUS
EFIAPI
- conditionally evaluates EFI_ERROR(
  VOID
);

EFI_STATUS
EFIAPI
FALSE;(
  VOID
);

EFI_STATUS
EFIAPI
buffer bounds(
  VOID
);

EFI_STATUS
EFIAPI
to internal rep movsb at sub_2D0(
  VOID
);

EFI_STATUS
EFIAPI
to internal rep stosb at sub_320(
  VOID
);

EFI_STATUS
EFIAPI
switch tree mapping error codes 0..255 and(
  VOID
);

EFI_STATUS
EFIAPI
values to category codes 0..11(
  VOID
);

EFI_STATUS
EFIAPI
Entry Point (0x5A0)(
  VOID
);

EFI_STATUS
EFIAPI
global UEFI service table pointers (sub_5DC at 0x5DC)(
  VOID
);

EFI_STATUS
EFIAPI
main driver initialization (sub_A00 -> sub_798C)(
  VOID
);

EFI_STATUS
EFIAPI
= CrystalRidgeSmmDriverInit(ImageHandle, SystemTable);(
  VOID
);

EFI_STATUS
EFIAPI
installation failed, trigger assert(
  VOID
);

EFI_STATUS
EFIAPI
(Status < 0) {(
  VOID
);

EFI_STATUS
EFIAPI
Table Initialization (sub_5DC at 0x5DC)(
  VOID
);

EFI_STATUS
EFIAPI
SMM Base2 protocol to detect SMM context(
  VOID
);

EFI_STATUS
EFIAPI
= gBS_CR->LocateProtocol((
  VOID
);

EFI_STATUS
EFIAPI
PCD database pointer via DxePcdLib(
  VOID
);

EFI_STATUS
EFIAPI
Driver Initialization (sub_798C at 0x798C)(
  VOID
);

EFI_STATUS
EFIAPI
1: Determine execution context (SMM or DXE)(
  VOID
);

EFI_STATUS
EFIAPI
path: Get protocol interface pointers(
  VOID
);

EFI_STATUS
EFIAPI
= *(VOID **)gCrProtocol0;(
  VOID
);

EFI_STATUS
EFIAPI
2: Locate mCrInfo protocol via protocol interface(
  VOID
);

EFI_STATUS
EFIAPI
= ((PROTOCOL_INTERFACE *)gCrProtocol1)->LocateProtocol((
  VOID
);

EFI_STATUS
EFIAPI
3: Locate additional protocol for shared data(
  VOID
);

EFI_STATUS
EFIAPI
4: Register SMI notification for command type 25037(
  VOID
);

EFI_STATUS
EFIAPI
= ((PROTOCOL_INTERFACE *)gCrProtocol1)->Register((
  VOID
);

EFI_STATUS
EFIAPI
= TRUE;(
  VOID
);

EFI_STATUS
EFIAPI
SMI notification via Boot Services(
  VOID
);

EFI_STATUS
EFIAPI
= gBS_CR->RegisterProtocolNotify((
  VOID
);

EFI_STATUS
EFIAPI
5: Read SocketProcessorCoreConfig UEFI variable(
  VOID
);

EFI_STATUS
EFIAPI
= 301;(
  VOID
);

EFI_STATUS
EFIAPI
config HOB if variable not available(
  VOID
);

EFI_STATUS
EFIAPI
6: Initialize DIMM database from protocol data (sub_6DD0)(
  VOID
);

EFI_STATUS
EFIAPI
7: Read cache line size via CPUID(
  VOID
);

EFI_STATUS
EFIAPI
= CrystalRidgeGetCacheLineSize() * 8;(
  VOID
);

EFI_STATUS
EFIAPI
8: Configure SMI translation tables for NVDIMM (32) and ARS (4)(
  VOID
);

EFI_STATUS
EFIAPI
command type(
  VOID
);

EFI_STATUS
EFIAPI
Database Initialization (sub_6DD0 at 0x6DD0)(
  VOID
);

EFI_STATUS
EFIAPI
4 sockets, 6 channels per socket, 2 DIMMs per channel(
  VOID
);

EFI_STATUS
EFIAPI
(Socket = 0; Socket < CR_MAX_SOCKETS; Socket++) {(
  VOID
);

EFI_STATUS
EFIAPI
if DIMM is present via mCrInfo data(
  VOID
);

EFI_STATUS
EFIAPI
(CrystalRidgeIsDimmPresent(Socket, Channel, Dimm)) {(
  VOID
);

EFI_STATUS
EFIAPI
if DIMM is already initialized(
  VOID
);

EFI_STATUS
EFIAPI
(!gCrDimmDb[gCrDimmCount].Ptr) {(
  VOID
);

EFI_STATUS
EFIAPI
new DIMM entry(
  VOID
);

EFI_STATUS
EFIAPI
Lookup (sub_2794 at 0x2794)(
  VOID
);

EFI_STATUS
EFIAPI
search through DIMM database(
  VOID
);

EFI_STATUS
EFIAPI
(Index = 0; Index < gCrDimmCount; Index++) {(
  VOID
);

EFI_STATUS
EFIAPI
fallback entry if Flag 2 set(
  VOID
);

EFI_STATUS
EFIAPI
(Flags & 2) {(
  VOID
);

EFI_STATUS
EFIAPI
Configuration (sub_67D4 at 0x67D4)(
  VOID
);

EFI_STATUS
EFIAPI
all sockets, channels, DIMMs to configure translation(
  VOID
);

EFI_STATUS
EFIAPI
ConfigType=32 (NVDIMM): Set up control regions(
  VOID
);

EFI_STATUS
EFIAPI
(ConfigType == 32) {(
  VOID
);

EFI_STATUS
EFIAPI
translation table on first invocation(
  VOID
);

EFI_STATUS
EFIAPI
topology and set control region(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeSetSadTopology(Socket, BaseAddr);(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeSetSadBaseTopology(Socket, BaseAddr);(
  VOID
);

EFI_STATUS
EFIAPI
CrystalRidgeSetCrTopology(Socket, BaseAddr);(
  VOID
);

EFI_STATUS
EFIAPI
ConfigType=4 (ARS): Set up ARS regions(
  VOID
);

EFI_STATUS
EFIAPI
if (ConfigType == 4) {(
  VOID
);

EFI_STATUS
EFIAPI
topology-based setup for ARS(
  VOID
);

EFI_STATUS
EFIAPI
and Mailbox(
  VOID
);

EFI_STATUS
EFIAPI
if address is in HOB table or direct(
  VOID
);

EFI_STATUS
EFIAPI
up in translation table(
  VOID
);

EFI_STATUS
EFIAPI
Channel = gCrPerDimmData[Index * 6 + 4]; // byte_3E05C(
  VOID
);

EFI_STATUS
EFIAPI
} else {(
  VOID
);

EFI_STATUS
EFIAPI
SAD/interleave translation(
  VOID
);

EFI_STATUS
EFIAPI
the DIMM entry(
  VOID
);

EFI_STATUS
EFIAPI
= CrystalRidgeFindDimm(SocketId, Channel, DimmSlot, 0);(
  VOID
);

EFI_STATUS
EFIAPI
command via hardware mailbox interface(
  VOID
);

EFI_STATUS
EFIAPI
(IsLongOp) {(
  VOID
);

EFI_STATUS
EFIAPI
once if busy(
  VOID
);

EFI_STATUS
EFIAPI
Construction (sub_1FDFC at 0x1FDFC)(
  VOID
);

EFI_STATUS
EFIAPI
NFIT structure for given DIMM/region(
  VOID
);

EFI_STATUS
EFIAPI
NFIT table header(
  VOID
);

EFI_STATUS
EFIAPI
Setup (sub_7118 at 0x7118)(
  VOID
);

EFI_STATUS
EFIAPI
protocol callback buffer(
  VOID
);

EFI_STATUS
EFIAPI
default values and populate from mCrInfo data(
  VOID
);

EFI_STATUS
EFIAPI
4 sockets, 24 channels to discover active DIMMs(
  VOID
);

EFI_STATUS
EFIAPI
set topology configuration bytes(
  VOID
);

EFI_STATUS
EFIAPI
(UINT8 Socket = 0; Socket < CR_MAX_SOCKETS; Socket++) {(
  VOID
);

EFI_STATUS
EFIAPI
flags and timeouts(
  VOID
);

EFI_STATUS
EFIAPI
Near Memory Cache (SmmCrystalRidgeFlushNearMemoryLib)(
  VOID
);

EFI_STATUS
EFIAPI
flush initialization(
  VOID
);

EFI_STATUS
EFIAPI
reset notification callback(
  VOID
);

#endif /* __CRYSTALRIDGESMM_H__ */