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AMI-Aptio-BIOS-Reversed / PurleySktPkg / Override / UefiCpuPkg / Library / MtrrLib / MemCacheInit / README.md
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MemCacheInit

Field Value
Index 0371
Module MemCacheInit
PE Size 13,920 bytes
Phase PEI (Pre-EFI Initialization)
Sections .text / .rdata / .data / .reloc
Arch IA-32 (0x014C)
SHA256 a3089cf8b3be34398f82f1ce63a2f98f04c0ac63df1d

Overview

MemCacheInit provides MTRR (Memory Type Range Register) and cache attribute management during PEI on Intel Purley platforms. It programs fixed and variable MTRRs, applies cache attributes to memory regions, and manages GCD (Global Coherency Domain) memory space operations. The module also writes CMOS index registers to persist cache configuration across resets.

Key Functions

  • ModuleEntryPoint -- Main entry point; registers the cache initialization callback
  • CacheInitCallback -- Core cache initialization routine
  • MainInit -- Primary initialization dispatcher
  • MtrrLibProgramAllMtrrs -- Programs all fixed and variable MTRRs
  • MtrrSetMemoryAttribute -- Sets memory attributes via MTRR programming
  • CacheAttrSetRegion / CacheAttrApplyRegion -- Region-based cache attribute management
  • WriteBackCache -- Writes back and invalidates cache (WBINVD)
  • GetFvHob / GetGuidHob -- HOB traversal for firmware volume discovery
  • NotifyDxeEntry -- Signals DXE phase that cache init is complete

Dependencies

  • MdePkg (BaseMemoryLib, BaseLib)
  • PEI Services (HOB, PPI installation/location)
  • CMOS access for index register I/O
  • MSR read/write for MTRR programming

Platform

Intel Purley platform, Lenovo HR650X server.