/* Consolidated from decompiled shard files. */
/* Source: ffd82c71.c */
int PchPcieRpErwoRegInit()
{
  unsigned int i; // edi
  int v1; // ebx
  unsigned __int16 v2; // ax
  char v4; // [esp+10h] [ebp-8h]
  int v5; // [esp+14h] [ebp-4h] BYREF

  DebugPrint(64, (int)"PciERWORegInit() Start\
"); /*0xffd82c81*/
  if ( (unsigned __int8)PchInResumeMode() )
  {
    DebugPrint(64, (int)"DWR: PciERWORegInit() End\
");
  }
  else
  {
    PchGetSteppingInfo(); /*0xffd82c9b*/
    for ( i = 0; i < (unsigned __int8)PchGetPchPortCount(); ++i ) /*0xffd82ca2*/
    {
      PchGetPciDeviceLocation(&v5); /*0xffd82cb4*/
      v1 = PchPciSegmentGetDevice(0, v4, v5); /*0xffd82cc8*/
      if ( (unsigned __int16)PchPciSegmentRead16((unsigned __int16 *)v1) != 0xFFFF ) /*0xffd82cd9*/
      {
        v2 = PchPciSegmentRead16((unsigned __int16 *)(v1 + 68)); /*0xffd82cde*/
        PchPciSegmentWrite16(v1 + 68, v2); /*0xffd82ce9*/
        *(_DWORD *)(v1 + 76) = *(_DWORD *)(v1 + 76); /*0xffd82cf1*/
        *(_DWORD *)(v1 + 84) = *(_DWORD *)(v1 + 84); /*0xffd82cf7*/
        *(_DWORD *)(v1 + 216) |= 0x800000u; /*0xffd82d05*/
      }
    }
    DebugPrint(64, (int)"PciERWORegInit() End\
"); /*0xffd82d1f*/
  }
  return 0; /*0xffd82d26*/
}

/* Source: ffd82d2f.c */
int __fastcall PchPcieRpSpeedChange(int RootPortBitmap, int PciSegment)
{
  unsigned __int8 i_1; // al
  unsigned int i_2; // esi
  unsigned int i; // ebx
  int v5; // eax
  int v6; // edi
  unsigned int j; // esi
  int v8; // ebp
  unsigned int n0x96; // ebp
  unsigned int i_3; // esi
  unsigned int k; // ebp
  int v12; // esi
  unsigned int n0x96_2; // ebp
  unsigned int i_4; // esi
  unsigned int n0x96_1; // [esp+14h] [ebp-60h] BYREF
  unsigned int v17; // [esp+18h] [ebp-5Ch]
  int v18; // [esp+1Ch] [ebp-58h]
  int v19; // [esp+20h] [ebp-54h]
  _DWORD v20[20]; // [esp+24h] [ebp-50h]

  v18 = a2; /*0xffd82d36*/
  v19 = a1; /*0xffd82d3a*/
  if ( (unsigned __int8)PchInResumeMode() )
  {
    DebugPrint(64, (int)"DWR: PchPcieRpSpeedChange() End\
");
  }
  else
  {
    i_1 = PchGetPchPortCount(); /*0xffd82d5a*/
    i_2 = 0; /*0xffd82d5f*/
    for ( i = i_1; i_2 < i; ++i_2 ) /*0xffd82d66*/
    {
      v20[i_2] = 0; /*0xffd82d68*/
      if ( PchGetPciDeviceLocation(&n0x96_1) >= 0 ) /*0xffd82d80*/
      {
        v20[i_2] = PchPciSegmentGetDevice(0, v17, n0x96_1); /*0xffd82db2*/
      }
      else
      {
        v5 = GetReportStatusCodePpi(); /*0xffd82d82*/
        if ( v5 ) /*0xffd82d89*/
          (*(void (__cdecl **)(const char *, int, const char *))(v5 + 4))( /*0xffd82d9a*/
            "e:\\hs\\PurleySktPkg\\SouthClusterLbg\\LibraryPrivate\\PeiPchInitLib\\PchRootPorts.c",
            822,
            "((BOOLEAN)(0==1))");
      }
    }
    v6 = 0; /*0xffd82dbb*/
    for ( j = 0; j < i; ++j ) /*0xffd82dc1*/
    {
      v8 = v20[j]; /*0xffd82dc3*/
      if ( v8 ) /*0xffd82dc9*/
      {
        if ( (unsigned __int16)PchPciSegmentRead16((unsigned __int16 *)v20[j]) != 0xFFFF ) /*0xffd82dda*/
        {
          v17 = *(_DWORD *)(v8 + 76) & 0xF; /*0xffd82de2*/
          if ( v17 > 1 && !IsPchPcieRpGen3Capable(v19 + 28, j, *(_BYTE *)(j + v18)) ) /*0xffd82dfd*/
          {
            PchPciSegmentFlush(v17); /*0xffd82e13*/
            if ( (PchPciSegmentRead16((unsigned __int16 *)(v8 + 90)) & 0x40) != 0 ) /*0xffd82e23*/
            {
              PchPciSegmentSetBar(v8 + 80, 32); /*0xffd82e2b*/
              v6 |= 1 << j; /*0xffd82e30*/
            }
          }
        }
      }
    }
    n0x96 = 0; /*0xffd82e38*/
    n0x96_1 = 0; /*0xffd82e3a*/
    if ( v6 ) /*0xffd82e40*/
    {
      do /*0xffd82e90*/
      {
        if ( n0x96 >= 0x96 ) /*0xffd82e4c*/
          break; /*0xffd82e4c*/
        Stall(0x64u); /*0xffd82e51*/
        i_3 = 0; /*0xffd82e56*/
        if ( i ) /*0xffd82e5a*/
        {
          do /*0xffd82e83*/
          {
            if ( ((1 << i_3) & v6) != 0 && (PchPciSegmentRead16((unsigned __int16 *)(v20[i_3] + 82)) & 0x2000) != 0 ) /*0xffd82e7b*/
              v6 &= ~(1 << i_3); /*0xffd82e7d*/
            ++i_3; /*0xffd82e80*/
          }
          while ( i_3 < i ); /*0xffd82e83*/
          n0x96 = n0x96_1; /*0xffd82e85*/
        }
        n0x96_1 = ++n0x96; /*0xffd82e8a*/
      }
      while ( v6 ); /*0xffd82e90*/
      if ( v6 ) /*0xffd82e94*/
      {
        for ( k = 0; k < i; ++k ) /*0xffd82e9e*/
        {
          if ( ((1 << k) & v6) != 0 ) /*0xffd82ea9*/
          {
            v12 = v20[k]; /*0xffd82eab*/
            PchPciSegmentFlush(1); /*0xffd82eb9*/
            PchPciSegmentSetBar(v12 + 80, 32); /*0xffd82ec5*/
          }
        }
        n0x96_2 = 0; /*0xffd82ecf*/
        n0x96_1 = 0; /*0xffd82ed1*/
        do /*0xffd82f1f*/
        {
          if ( n0x96_2 >= 0x96 ) /*0xffd82edb*/
            break; /*0xffd82edb*/
          Stall(0x64u); /*0xffd82ee0*/
          i_4 = 0; /*0xffd82ee5*/
          if ( i ) /*0xffd82ee9*/
          {
            do /*0xffd82f12*/
            {
              if ( ((1 << i_4) & v6) != 0 && (PchPciSegmentRead16((unsigned __int16 *)(v20[i_4] + 82)) & 0x2000) != 0 ) /*0xffd82f0a*/
                v6 &= ~(1 << i_4); /*0xffd82f0c*/
              ++i_4; /*0xffd82f0f*/
            }
            while ( i_4 < i ); /*0xffd82f12*/
            n0x96_2 = n0x96_1; /*0xffd82f14*/
          }
          n0x96_1 = ++n0x96_2; /*0xffd82f19*/
        }
        while ( v6 ); /*0xffd82f1f*/
      }
    }
  }
  return 0; /*0xffd82f21*/
}

/* Source: ffd82f2b.c */
bool __fastcall PchPcieRpGetEndpointInfo(int RootPort, unsigned __int8 RootPortIndex, unsigned __int16 *EndpointInfo)
{
  char v5; // bl
  unsigned int v7; // ebp
  unsigned __int8 v8; // al
  unsigned __int16 *v9; // ecx
  unsigned int *v11; // [esp+1Ch] [ebp+4h]

  v5 = 0; /*0xffd82f40*/
  *(_DWORD *)(a3 + 1) = 0xFFFF; /*0xffd82f42*/
  *a3 = -1; /*0xffd82f49*/
  if ( (PchPciSegmentRead16((unsigned __int16 *)(a1 + 90)) & 0x40) == 0 ) /*0xffd82f56*/
    return 0; /*0xffd82f58*/
  *(_DWORD *)(a1 + 24) = *(_DWORD *)(a1 + 24) & 0xFF0000FF | ((a2 | (a2 << 8)) << 8); /*0xffd82f7c*/
  v11 = (unsigned int *)PchPciSegmentGetDevice(a2, 0, 0); /*0xffd82f8b*/
  PchPciSegmentWrite16(v11, 0); /*0xffd82f8f*/
  v7 = *v11; /*0xffd82f94*/
  *(_DWORD *)a3 = *v11; /*0xffd82f9c*/
  if ( v7 != -1 ) /*0xffd82fa6*/
  {
    v8 = PchPciSegmentGetCapabilityOffset(0, HIWORD(v7)); /*0xffd82fb0*/
    if ( v8 ) /*0xffd82fb9*/
    {
      v9 = (unsigned __int16 *)((char *)v11 + v8 + 12); /*0xffd82fc5*/
      v5 = *(_BYTE *)v9 & 0xF; /*0xffd82fc9*/
      *((_BYTE *)a3 + 5) = ((unsigned __int16)PchPciSegmentRead16(v9) >> 4) & 0x3F; /*0xffd82fd7*/
    }
    *((_BYTE *)a3 + 4) = v5; /*0xffd82fda*/
  }
  *(_DWORD *)(a1 + 24) &= 0xFF0000FF; /*0xffd82fe5*/
  DebugPrint(
    64,
    (int)"VID: %04X DID: %04X  MLS: %d MLW: %d\
",
    *a3,
    a3[1],
    *((unsigned __int8 *)a3 + 4),
    *((unsigned __int8 *)a3 + 5));
  return v7 != -1; /*0xffd83012*/
}

/* Source: ffd83019.c */
int PchExecuteDirtyWarmReset()
{
  int result; // eax
  int v1; // eax
  int v2; // esi
  int v3; // eax
  int *v4; // eax
  int *v5; // esi
  int v6; // ecx
  int v7; // eax
  int v8; // esi
  int v9; // eax
  _DWORD v10[2]; // [esp+0h] [ebp-10h] BYREF
  char v11[8]; // [esp+8h] [ebp-8h] BYREF

  result = PchInResumeMode(); /*0xffd8301c*/
  if ( (_BYTE)result )
  {
    DebugPrint(0x80000000, (int)"\
DirtyWarmResetExecute() - Start\
"); /*0xffd83037*/
    v1 = GetPchPolicy(); /*0xffd8303c*/
    v2 = PchGetPchPolicy(v1); /*0xffd83048*/
    if ( PchPcieRpGetEndpointInfo(v2, 2u, (unsigned __int16 *)v11) )
    {
      *(_DWORD *)(v2 + 24) = *(_DWORD *)(v2 + 24) & 0xFF0000FF | 0x20200; /*0xffd83083*/
      v3 = PchPciSegmentGetDevice(2u, 0, 0); /*0xffd83086*/
      PchPciSegmentWrite16(v3, 0); /*0xffd83090*/
    }
    else
    {
      DebugPrint(0x80000000, (int)"ERROR: DirtyWarmReset: can't get end point device available...\
");
    }
    v4 = (int *)PchGetResumeStatus(); /*0xffd83099*/
    v5 = v4; /*0xffd8309e*/
    v6 = *v4; /*0xffd830a8*/
    if ( (*v4 & 0x2000000) != 0 && v6 != -1 ) /*0xffd830b5*/
      *v4 = v6 | 0x4000000; /*0xffd830b9*/
    DebugPrint(64, (int)"DWR: Sending DirtyWarmReset Notification ...\
");
    InstallPpi(&unk_FFD93FB4); /*0xffd830cc*/
    DebugPrint(64, (int)"DWR: DirtyWarmReset Notification completed\
");
    if ( (*v5 & 0x2000000) != 0 && *v5 != -1 )
    {
      DebugPrint(64, (int)"\
DWR: Stalling in DWR flow to allow error collection.\
");
      while ( (*v5 & 0x4000000) != 0 ) /*0xffd83100*/
        ; /*0xffd830fc*/
    }
    v7 = GetPeiServicesPtr(); /*0xffd83102*/
    v8 = (*(int (__cdecl **)(int, void *, _DWORD, _DWORD, _DWORD *))(*(_DWORD *)v7 + 32))(v7, &unk_FFD97FAC, 0, 0, v10); /*0xffd8311c*/
    if ( v8 < 0 )
    {
      DebugPrint(0x80000000, (int)"\
DWR: ERROR: Can't get reset PPI\
");
      DebugPrint(0x80000000, (int)"\
ASSERT_EFI_ERROR (Status = %r)\
", v8); /*0xffd83142*/
      v9 = GetReportStatusCodePpi(); /*0xffd8314a*/
      if ( v9 ) /*0xffd83151*/
        (*(void (__cdecl **)(const char *, int, const char *))(v9 + 4))( /*0xffd83162*/
          "e:\\hs\\PurleySktPkg\\SouthClusterLbg\\LibraryPrivate\\PeiPchInitLib\\PchRootPorts.c",
          1104,
          "!EFI_ERROR (Status)");
    }
    else
    {
      (*(void (__cdecl **)(_DWORD, int))v10[0])(v10[0], 5); /*0xffd8312a*/
    }
    DebugPrint(0x80000000, (int)"\
DWR: Waiting for reset.\
");
    v10[1] = 0; /*0xffd83175*/
    while ( 1 ) /*0xffd83179*/
      ; /*0xffd83179*/
  }
  return result; /*0xffd83182*/
}