| Address | Name | Description |
|---|---|---|
| ReadUnaligned64 | ||
| CompareGuid | ||
| GetPciExpressBaseAddress | ||
| CrbPeiEntryPoint | ||
| Forward | declarations | |
| VOID | * | |
| GUID | definitions for the HOBs this module consumes | |
| EFI_GUID | gEfiIioUdsHobGuid = { 0x4A43824B, 0x307F, 0x45BA, { 0x9D, 0xC3, 0xFE, 0x9F, 0xC6, 0xB3, 0x81, 0x48 } }; | |
| Src | = &((CHAR8 *)Source)[Count - 1]; | |
| CountAligned | = Count & 3; | |
| Debug | disabled | |
| DebugLevel | > 3 | |
| if | (DebugLevel == 0) { | |
| EFI_D_ERROR | } | |
| End | of HOB list | |
| EFI_HOB_TYPE_GUID_EXTENSION | break; | |
| GetDebugPrintInterface | (); | |
| Found | the IIO UDS HOB | copy the routing data |
| Copy | 6 bytes per stack entry | |
| Advance | to next entry: | |
| Destination | stride = 8 bytes | |
| Source | stride = 43 bytes per IIO stack | |
| Dst | = (UINT8 *)(SegBusTable + 9 + (UINT64)UINT32); | |
| PCI | config: CF8 = 0x80002890 => Bus 0, Dev 5, Func 0, Reg 0x24 | |
| __outdword | (0xCF8, 0x80002890); | |
| Token | 113: PcdMicrocodePatchAddress | |
| Token | 114: PcdMicrocodePatchRegionSize | |
| Clear | PCIC bit in IIO UDS | |
| Step | 1: Read PCIE base address from hardware | |
| PciExpressBaseAddress | = GetPciExpressBaseAddress (); | |
| Step | 2: Store into PCD via PCD service (PcdPciExpressBaseAddress, token 5) | |
| PcdService | = GetPcdServiceInterface (); | |
| Step | 3: Read back the PCD to verify | |
| Step | 4: Install FV file HOB so the PEI dispatcher picks up the callback | |
| PPIs | registered by CrbPeiMainEntry() | |
| if | ((*(INT32 (__cdecl )(EFI_SYSTEM_TABLE , VOID ))(LODWORD(SystemTable->Hdr.Signature) + 36))(** |
Generated by HR650X BIOS Decompilation Project