FpgaConfigDataDxeNeonCityFPGA

Function Table

Address	Name	Description
	DebugAssert
	GetCmosDebugLevel
	DebugPrint
	CompareGuid
	ReadUnaligned64
	FreePool
	GetFpgaConfigHob
	FpgaConfigDataEntry
	GetFpgaConfigData
	_ModuleEntryPoint
GUID	Definitions
HSSI	Card Configuration Table (0x3ED0, 2 entries x 24 bytes = 48 bytes)
This	table maps (socket, card_type) pairs to PXB config data and callback
Entry	0: Socket=0, CardType=0x04, PxbConfig=Ptr(0x14C0), ConfigData=0x448
Entry	1: Socket=0, CardType=0x06, PxbConfig=Ptr(0x3F00), ConfigData=0x448
The	PxbConfig entries at 0x14C0 and 0x3F00 are arrays of PXB register
configuration	tuples. Each tuple is 8 bytes:
HSSI_CARD_CONFIG_ENTRY	mHssiCardConfigTable[MAX_HSSI_CONFIG_ENTRIES] = {
Global	Variables (.data / .bss section, 0x6920-0x6986)
Standard	UEFI globals (populated by _ModuleEntryPoint).
EFI_SYSTEM_TABLE	*gST = NULL; // 0x6920
0x6928	EFI_HANDLE gImageHandle = NULL; // 0x6930
0x6938	//
Cached	protocol/state pointers.
VOID	*mDebugProtocol = NULL; // 0x6940	cached DebugLib protocol
0x6948	-- cached HOB list pointer
0x6950	-- cached CMOS debug level byte
FPGA	configuration data (0x6960, 38 bytes).
FPGA_CONFIG_DATA	mFpgaConfigData = { 0 };
Zero	aligned 8-byte chunks.
Zero	remaining bytes (0-7).
Assert	Handler (sub_830, 0x830-0x86D)
Call	DebugLib protocol's Assert at offset +0x08.
CMOS	Debug Level Reader (sub_7A8 inner logic, inline)
Read	CMOS register 0x4B.
Preserve	NMI disable bit (bit 7) on port 0x70.
If	CMOS level is 0, fall back to MMIO register at 0xFDAF0490.
if	(DebugLevel == 0) {
Debug	Print (sub_7A8, 0x7A8-0x82F)
Map	CMOS debug level to allowed error level mask.
if	(DebugLevel <= 3) {
Level	0-3: allow only up to a threshold.
Level	0 -> no output (AllowedLevel stays 0).
0x80000000	} else if (DebugLevel == 2) {
DEBUG_ERROR	**	DEBUG_INFO**
Level	4 or above: allow all.
AllowedLevel	= (UINTN)-1;
Call	DebugLib protocol's DebugPrint at offset +0x00.
GetDebugProtocol	(sub_728, 0x728-0x7A6)
Allocate	and immediately free a 0-byte pool as a canary to verify
that	UEFI boot services are functional.
TestBuffer	= AllocatePool(EfiBootServicesData, 0);
On	a functional UEFI, AllocatePool(0) returns a non-NULL pointer with
a	valid address (> 0x10). If TestBuffer <= 0x10, boot services are not
if	((UINTN)TestBuffer <= 0x10) {
Locate	the DebugLib protocol.
Protocol	= NULL;
GUID	Comparison (sub_BA4, 0xBA4-0xC0A)
ReadUnaligned64	(sub_C0C, 0xC0C-0xC3A)
Allocate	Pool (sub_C3C, 0xC3C-0xC6A)
Free	Pool (sub_C6C, 0xC6C-0xCAE)
HOB	List Locator (sub_870, 0x870-0x94C)
Found	the HOB list	extract the pointer at offset +0x10 within
the	configuration table entry (after the 16-byte GUID).
HobList	*= (VOID )((UINTN)gST->ConfigurationTable +
HOB	Walk Sub-function (sub_950, 0x950-0x99C)
return	NULL;
EFI_HOB_TYPE_GUID_EXT	(type 4)	this is a GUID-extension HOB.
Advance	to next HOB: HobLength is at offset +0x02.
Hob	*= (UINT16 )((UINTN)Hob + Hob[1]);**
Get	FPGA Config HOB (sub_9A0, 0x9A0-0xBA2)
Walk	HOBs looking for a GUID-extension HOB that matches the FPGA
config	pattern (dual-GUID check: gFpgaConfigProtocolGuid +
GuidHob	= FindGuidHob(HobList);
if	(CompareGuid(
Found	the FPGA config HOB. Return pointer to payload.
Continue	walking.
GuidHob	*= FindGuidHob((VOID )((UINTN)GuidHob +* (UINT16 )((UINTN)GuidHob + 2)));*
HOB	not found	create one.
Initialize	new HOB with ZeroMem.
Set	default values in the new HOB.
Initialize	HSSI card IDs to 0xFF (unknown/uninitialized).
for	(Index = 0; Index < MAX_SOCKET_COUNT; Index++) {
Default	sub-ID for unknown card
Set	initial bifurcation and APIC values.
Try	to load saved configuration from UEFI variable "FpgaSocketConfig".
VariableSize	= sizeof(FPGA_CONFIG_DATA);
Read	the UEFI variable.
if	(gRT->GetVariable(
Copy	fields from the variable into the HOB.
Copy	HSSI card data per socket.
For	each socket i:
HssiCardSubId	= VarData.HssiCardSubId[i]
Bifurcation	= VarData.Bifurcation[i]
offset	depends on layout
source	bifurcation
Return	the newly created HOB data pointer.
FPGA	Configuration Data Entry (sub_51C, 0x51C-0x725)
Log	module identification string.
Get	FPGA configuration data from HOB.
Status	= GetFpgaConfigHob(&ConfigBuffer);
Extract	configuration fields from the HOB data.
Data	*= (UINT8 )ConfigBuffer;**
Copy	the raw first two bytes.
offset	+0x00
offset	+0x01
Copy	HSSI card data and bifurcation from HOB offset +0x0B to +0x1F.
for	(Index = 0; Index < 4; Index++) {
Log	active socket mask.
Check	if any FPGA sockets are active.
if	(mFpgaConfigData.FpgaSktActive == 0) {
Check	for HSSI cards on each socket.
for	(SocketIndex = 0; SocketIndex < MAX_SOCKET_COUNT; SocketIndex++) {
0	= no card, 7 = reserved type. If we find a real card, continue.
if	(HssiCardType != 0 && HssiCardType != 7) {
If	no HSSI card found on any socket, log and return.
if	(SocketIndex >= MAX_SOCKET_COUNT) {
Install	the FPGA Configuration protocol.
Protocol	GUID at 0x1460, interface at off_14B0 which points to GetFpgaConfigData.
NewHandle	= ImageHandle;
GetFpgaConfigData	Protocol Callback (sub_448, 0x448-0x51B)
NULL	pointer validation.
if	**(PxbConfig == NULL		ConfigDataPtr == NULL) {**
Check	if the requested socket is active.
FpgaSktActive	bitmask: bit 0 = socket 0, bit 1 = socket 1, etc.
if	((mFpgaConfigData.FpgaSktActive & (1 << Socket)) == 0) {
Validate	HSSI card type.
Supported	types: 4, 6 (other types up to 5 and type 5 itself are invalid).
if	**((HssiCardType <= 3)		(HssiCardType == 5)) {**
Linear	search the HSSI card config table.
mHssiCardConfigTable	has 2 entries of sizeof(HSSI_CARD_CONFIG_ENTRY) = 24 bytes.
EntryOffset	= 0;
Match	found	return the PXB config and data pointer.
No	matching entry found.
return	EFI_NOT_FOUND;
Module	Entry Point (_ModuleEntryPoint, 0x390-0x447)
Initialize	global image handle.
gImageHandle	= (EFI_HANDLE)ImageHandle;
Initialize	global system table pointer.
gST	= SystemTable;
Initialize	global boot services pointer.
gBS	= SystemTable->BootServices;
Initialize	global runtime services pointer.
gRT	= SystemTable->RuntimeServices;
Resolve	HOB list and perform FPGA configuration setup.

Generated by HR650X BIOS Decompilation Project