FpgaDxe

Module: 0089
File: FpgaDxe.efi
Size: 28032 bytes (0x6D80)
Phase: DXE (Driver Execution Environment)
Source package: PurleySktPkg
Build: VS2015, X64, DEBUG
Source path: e:\hs\PurleySktPkg\Dxe\FpgaInit\FpgaDxe\FpgaDxe.c

Overview

FPGA initialization DXE driver for the Purley platform (HR650X). Reads FPGA configuration from a HOB (Hand-Off Block) or creates one from UEFI variables ("FpgaSocketConfig"). Locates PCI(e) root bridge I/O and USRA (Universal Segment Resource Access) protocols for MMIO/PCI config space access. Initializes S3 boot script services to save/restore FPGA register state across S3 resumes. On ReadyToBoot, enumerates FPGA devices per active socket, programs PCI bus/subordinate numbers, FME BARs, temperature thresholds, HSSI configuration, and miscellaneous FPGA control registers. Triggers a software SMI to finalize FPGA initialization in SMM.

Key Functions

Function	Description
`_ModuleEntryPoint`	UEFI driver entry point; initializes services, locates protocols, sets up FPGA
`InitializeLibServices`	Stores UEFI service table pointers (boot, runtime, system)
`GetDxeServicesTable`	Locates and caches the DXE Services Table
`GetPcdProtocol`	Locates the PCD protocol
`GetMmPciBaseProtocol`	Locates the MM PCI USRA protocol
`GetUsraProtocol`	Locates the USRA protocol
`GetSmmCommunication`	Sets up SMM communication for FPGA SMI trigger
`S3BootScriptEventNotify`	Saves FPGA register state for S3 resume
`S3BootScriptBackupNotify`	Backs up S3 boot script data
`FpgaInitReadyToBoot`	ReadyToBoot callback; enumerates and configures FPGA devices per socket
`FpgaProgramPciBusNumbers`	Programs PCI bus/subordinate numbers for FPGA devices
`FpgaProgramFmeBar`	Configures FME (FPGA Management Engine) BARs
`FpgaSetTempThresholds`	Programs FPGA temperature threshold registers
`FpgaConfigureHssi`	Configures HSSI (High-Speed Serial Interface) settings
`FpgaTriggerSmi`	Triggers a software SMI for SMM-based FPGA finalization

Protocols/Dependencies

USRA Protocol - Universal Segment Resource Access
MmPciUsra Protocol - MMIO PCI USRA access
PCD Protocol - Platform Configuration Database
SMM Communication Protocol - For triggering SMI to SMM FPGA driver
S3 Boot Script Library - Save/restore FPGA register state across S3
LockBox - Preserve runtime data across S3
FpgaSocketConfig UEFI variable - FPGA socket configuration
HOB (Hand-Off Block) - FPGA config data from PEI phase

Platform

Intel Purley platform (HR650X) - FPGA initialization for PCIe accelerators