/**
 *FpgaPlatformEarlyInit - FPGA Platform Early Initialization PEIM
 *
 *Source paths from debug strings:
 *PurleyPlatPkg/Platform/Pei/FpgaPlatformInit/FpgaPlatformEarlyInit.c
 *PurleyPlatPkg/Platform/Pei/FpgaPlatformInit/FpgaBbsInit.c
 *PurleyPlatPkg/Library/FpgaPlatformHooksLib/FpgaPlatformHooksLib.c
 *MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c
 *MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c
 *MdePkg/Library/BaseLib/CheckSum.c
 *MdePkg/Library/BaseLib/Unaligned.c
 *MdePkg/Library/BaseLib/X86ReadIdtr.c
 *MdePkg/Library/PeiHobLib/HobLib.c
 *MdePkg/Library/PeiPcdLib/PeiPcdLib.c
 *MdePkg/Library/PeiServicesLib/PeiServicesLib.c
 *MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointer.c
 *
 *Module: FpgaPlatformEarlyInit.efi
 *MD5: dd148413a09f7726607d0169ec593940
 *SHA256: 419e20671d52d16d32dc5522bb485b6caf533b1f96ebca66fb8d0ed42d08ab69
 *Image base: 0xffdb2054
 *Image size: 0x2240 (8768 bytes)
 *Architecture: IA32 (32-bit)
 *
 *Analysis date: 2026-06-02
 *Functions: 36 total (1 exported + 35 internal)
 */

#include "FpgaPlatformEarlyInit.h"

//
// Forward declarations for internal helpers
//

//
// GUIDs used by this module (from .data section)
//
// gFpgaPlatformConfigHobGuid at 0xffdb4114
// gFpgaPlatformHooksPpiGuid at 0xffdb4104
// gFpgaPlatformVariableGuid at 0xffdb4074
// gEfiStatusCodeProtocolGuid at 0xffdb4084
// gFpgaSocketConfigVarGuid at 0xffdb40A4
// gEfiPeiMrcHooksChipServicesPpiGuid at 0xffdb40E4
// gEfiPeiMpServicesPpiGuid at 0xffdb40C4
// gEfiFirmwareFileSystem2Guid at 0xffdb40D4
// gEfiPeiFvInfoPpiGuid at 0xffdb40F4
// gEfiPeiPcdPpiGuid at 0xffdb4124
// gEfiPeiBootInRecoveryBootModePpiGuid at 0xffdb4094

//
// Global variables
//
UINT8 n3;
INT32 dword_FFDB4140;
INT32 dword_FFDB4148;
INT32 dword_FFDB4150;

//
// Internal Memory/String Library Functions
//

/**
 *Copy memory with backward overlap support (internal).
 *Used when Source < Destination and ranges overlap.
 */
char *InternalCopyMemBackward(
 char *dst,
 char *src,
 unsigned int count
 )
{
 unsigned int count; // edx char *dst_1; // edi char *src_1; // esi count = count_1;
 if ( src < dst && &src[count_1 - 1] >= dst )
 {
 src_1 = &src[count_1 - 1];
 dst_1 = &dst[count_1 - 1];
 }
 else
 {
 count = count_1 & 3;
 qmemcpy(dst, src, 4 * (count_1 >> 2));
 src_1 = &src[4 * (count_1 >> 2)];
 dst_1 = &dst[4 * (count_1 >> 2)];
 }
 qmemcpy(dst_1, src_1, count);
 return dst;
}

/**
 *Zero memory (internal).
 */
void *InternalZeroMem(
 void *buf,
 unsigned int count
 )
{
 memset(buf, 0, count);
 return buf;
}

/**
 *Set memory to a value (internal).
 */
void *InternalSetMem(
 void *buf,
 unsigned int count,
 char value
 )
{
 memset(buf, value, count);
 return buf;
}

/**
 *Set an array of (value1, value2) pairs (internal).
 *Used for initializing pairs of DWORD values.
 */
int InternalSetMem32(
 int a1,
 int a2,
 int a3,
 int a4
 )
{
 do
 {
 *(_DWORD *)(a1 + 8 *a2 - 8) = a3;
 *(_DWORD *)(a1 + 8 *a2-- - 4) = a4;
 }
 while ( a2 );
 return a1;
}

/**
 *Fill memory with DWORD value (internal).
 */
void *InternalZeroMem32(
 void *buf,
 unsigned int count,
 int value
 )
{
 memset32(buf, value, count);
 return buf;
}

/**
 *Copy memory with bounds checking wrapper.
 */
char *InternalCopyMem(
 char *dst,
 char *src,
 unsigned int count
 )
{
 int v5; // eax int v6; // eax if ( count - 1 > -1 - (int)dst )
 {
 v5 = InternalGetReportStatusCodeProtocol();
 if ( v5 )
 (*(void ( **)(const char *, int, const char *))(v5 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseMemoryLibRepStr\\CopyMemWrapper.c",
 56,
 "(Length - 1) <= (0xFFFFFFFF - (UINTN)DestinationBuffer)");
 }
 if ( count - 1 > -1 - (int)src )
 {
 v6 = InternalGetReportStatusCodeProtocol();
 if ( v6 )
 (*(void ( **)(const char *, int, const char *))(v6 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseMemoryLibRepStr\\CopyMemWrapper.c",
 57,
 "(Length - 1) <= (0xFFFFFFFF - (UINTN)SourceBuffer)");
 }
 if ( dst == src )
 return dst;
 else return InternalCopyMemBackward(dst, src, count);
}

/**
 *Zero memory with bounds checking wrapper.
 */
void *InternalZeroMemWithCheck(
 int buf,
 unsigned int this
 )
{
 int v5; // eax int v6; // eax if ( !this )
 return (void *)buf;
 if ( !buf )
 {
 v5 = InternalGetReportStatusCodeProtocol();
 if ( v5 )
 (*(void ( **)(const char *, int, const char *))(v5 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseMemoryLibRepStr\\ZeroMemWrapper.c",
 53,
 "Buffer != ((void *) 0)");
 }
 if ( this > -buf )
 {
 v6 = InternalGetReportStatusCodeProtocol();
 if ( v6 )
 (*(void ( **)(const char *, int, const char *))(v6 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseMemoryLibRepStr\\ZeroMemWrapper.c",
 54,
 "Length <= (0xFFFFFFFF - (UINTN)Buffer + 1)");
 }
 return InternalZeroMem((void *)buf, this);
}

/**
 *Calculate 16-bit checksum over a buffer.
 */
UINT16 InternalCalculateCheckSum16(
 int a1,
 unsigned int a2
 )
{
 char v2; // al int v4; // eax int v5; // eax int v6; // eax int v7; // eax unsigned int v8; // ebx unsigned int v9; // ecx __int16 result; // ax v2 = a1;
 if ( !a1 )
 {
 v4 = InternalGetReportStatusCodeProtocol();
 if ( v4 )
 (*(void ( **)(const char *, int, const char *))(v4 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseLib\\CheckSum.c",
 122,
 "Buffer != ((void *) 0)");
 v2 = 0;
 }
 if ( (v2 & 1) != 0 )
 {
 v5 = InternalGetReportStatusCodeProtocol();
 if ( v5 )
 (*(void ( **)(const char *, int, const char *))(v5 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseLib\\CheckSum.c",
 123,
 "((UINTN) Buffer & 0x1) == 0");
 }
 if ( (a2 & 1) != 0 )
 {
 v6 = InternalGetReportStatusCodeProtocol();
 if ( v6 )
 (*(void ( **)(const char *, int, const char *))(v6 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseLib\\CheckSum.c",
 124,
 "(Length & 0x1) == 0");
 }
 if ( a2 > -a1 )
 {
 v7 = InternalGetReportStatusCodeProtocol();
 if ( v7 )
 (*(void ( **)(const char *, int, const char *))(v7 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseLib\\CheckSum.c",
 125,
 "Length <= (0xFFFFFFFF - ((UINTN) Buffer) + 1)");
 }
 v8 = a2 >> 1;
 v9 = 0;
 for ( result = 0; v9 < v8; ++v9 )
 result += *(_WORD *)(a1 + 2 *v9);
 return result;
}

/**
 *Check firmware volume alignment.
 *Returns 1 if aligned, 0 if not.
 */
UINT8 InternalFvAlignmentCheck(
 UINTN a1
 )
{
 int v1; // ecx unsigned int n8; // esi v1 = *(_DWORD *)(a1 + 44);
 if ( v1 < 0 )
 return 1;
 n8 = 1 << (BYTE2(v1) & 0x1F);
 if ( n8 < 8 )
 n8 = 8;
 if ( !(a1 % n8) )
 return 1;
 FpgaReportStatusCode(0x80000000, "Unaligned FvImage found at 0x%lx:0x%lx, the required alignment is 0x%x\n");
 return 0;
}

/**
 *Read CMOS/RTC byte to determine system state.
 *Returns 0 for normal, negative error codes for failures.
 */
UINT8 InternalReadCmosByte(
 VOID
 )
{
 unsigned __int8 v0; // al char n3; // al char n3_1; // cl v0 = __inbyte(0x70u);
 __outbyte(0x70u, v0 & 0x80 | 0x4A);
 n3 = __inbyte(0x71u);
 n3_1 = n3;
 if ( (unsigned __int8)n3 <= 3u )
 {
LABEL_4:
 if ( !n3_1 )
 return 0;
 goto LABEL_5;
 }
 n3_1 = n3;
 if ( !n3 )
 {
 n3_1 = MEMORY[0xFDAF0490] & 2 | 1;
 goto LABEL_4;
 }
LABEL_5:
 if ( n3_1 != -1 )
 return n3_1 != 1 ? -2147483578 : -2147483644;
 return 0;
}

//
// GUID Manipulation Functions
//

/**
 *Copy a GUID (16 bytes as two uint64 values).
 */
void CopyGuid(
 GUID *GuidOut,
 GUID *GuidIn
 )
{
 UINT64 v4; // rax UINT64 v5; // rax v4 = InternalReadUnaligned64(GuidIn);
 InternalWriteUnaligned64(v4, HIDWORD(v4));
 v5 = InternalReadUnaligned64(GuidIn + 8);
 InternalWriteUnaligned64(v5, HIDWORD(v5));
}

/**
 *Compare two GUIDs for equality.
 */
BOOLEAN CompareGuid(
 GUID *Guid1,
 GUID *Guid2
 )
{
 UINT64 v4; // rax int v5; // ebp UINT64 v6; // rax int v7; // edi UINT64 v8; // kr00_8 UINT64 v9; // rax int v11; // [esp+10h] [ebp-Ch]
 int v12; // [esp+14h] [ebp-8h]

 v4 = InternalReadUnaligned64(Guid1);
 v12 = HIDWORD(v4);
 v5 = v4;
 v6 = InternalReadUnaligned64(Guid2);
 v11 = HIDWORD(v6);
 v7 = v6;
 v8 = InternalReadUnaligned64(Guid1 + 8);
 v9 = InternalReadUnaligned64(Guid2 + 8);
 return v5 == v7 && v12 == v11 && v8 == v9;
}

//
// PEI Services / Service Access Functions
//

/**
 *Get PEI Services table pointer via IDTR-based lookup.
 */
int InternalGetPeiServices(
 VOID
 )
{
 int v0; // esi _BYTE v2[8]; // [esp+4h] [ebp-8h] BYREF InternalReadIdtr(v2);
 v0 = *(_DWORD *)(*(_DWORD *)&v2[2] - 4);
 if ( !v0 )
 FpgaReportStatusCodeAssert(
 (int)"e:\\hs\\MdePkg\\Library\\PeiServicesTablePointerLibIdt\\PeiServicesTablePointer.c",
 48,
 (int)"PeiServices != ((void *) 0)");
 return v0;
}

/**
 *Read IDTR (Store Interrupt Descriptor Table Register).
 */
void *InternalReadIdtr(
 VOID *Idtr
 )
{
 if ( !Idtr )
 FpgaReportStatusCodeAssert((int)"e:\\hs\\MdePkg\\Library\\BaseLib\\X86ReadIdtr.c", 37, (int)"Idtr != ((void *) 0)");
 __sidt(Idtr);
 return Idtr;
}

/**
 *Read a 64-bit value from an unaligned address.
 */
UINT64 InternalReadUnaligned64(
 VOID *Buffer
 )
{
 int v2; // eax if ( !Buffer )
 {
 v2 = InternalGetReportStatusCodeProtocol();
 if ( v2 )
 (*(void ( **)(const char *, int, const char *))(v2 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseLib\\Unaligned.c",
 192,
 "Buffer != ((void *) 0)");
 }
 return *(_QWORD *)Buffer;
}

/**
 *Write a 64-bit value to an (possibly unaligned) address.
 */
int InternalWriteUnaligned64(
 VOID *Buffer,
 INTN ValueLo,
 INTN ValueHi
 )
{
 _DWORD *v2; // ecx _DWORD *v3; // esi int v4; // eax v3 = v2;
 if ( !v2 )
 {
 v4 = InternalGetReportStatusCodeProtocol();
 if ( v4 )
 (*(void ( **)(const char *, int, const char *))(v4 + 4))(
 "e:\\hs\\MdePkg\\Library\\BaseLib\\Unaligned.c",
 219,
 "Buffer != ((void *) 0)");
 }
 *v3 = ValueLo;
 v3[1] = ValueHi;
 return ValueLo;
}

//
// Protocol/PPI Access Functions
//

/**
 *Get the ReportStatusCode protocol/PPI interface.
 *Uses gEfiStatusCodeProtocolGuid at 0xffdb4084.
 */
int InternalGetReportStatusCodeProtocol(
 VOID
 )
{
 int v0; // eax int v2; // [esp+0h] [ebp-8h] BYREF int v3; // [esp+4h] [ebp-4h] BYREF v0 = InternalGetPeiServices();
 if ( (*(int ( **)(int, void *, _DWORD, int *, int *))(*(_DWORD *)v0 + 32))(v0, &unk_FFDB4084, 0, &v2, &v3) >= 0 )
 return v3;
 else return 0;
}

/**
 *Report status code with debug message.
 */
int FpgaReportStatusCode(
 int a1,
 int a2,
 ...
 )
{
 int result; // eax int ( **v3)(int, int, char *); // esi va_list va; // [esp+10h] [ebp+Ch] BYREF va_start(va, a2);
 result = InternalGetReportStatusCodeProtocol();
 v3 = (int ( **)(int, int, char *))result;
 if ( result )
 {
 result = InternalReadCmosByte();
 if ( (result & a1) != 0 )
 return (*v3)(a1, a2, (char *)va);
 }
 return result;
}

/**
 *Report status code assertion (file:line:expression).
 */
int FpgaReportStatusCodeAssert(
 int a1,
 int a2,
 int a3
 )
{
 int result; // eax result = InternalGetReportStatusCodeProtocol();
 if ( result )
 return (*(int ( **)(int, int, int))(result + 4))(a1, a2, a3);
 return result;
}

//
// HOB Library Functions
//

/**
 *Get HOB list pointer.
 */
int GetHobList(
 VOID
 )
{
 int v0; // eax int v1; // eax int v2; // eax int v4; // [esp+0h] [ebp-8h]
 int v5; // [esp+4h] [ebp-4h] BYREF v0 = InternalGetPeiServices();
 if ( (*(int ( **)(int, int *))(*(_DWORD *)v0 + 48))(v0, &v5) < 0 )
 {
 FpgaReportStatusCode(0x80000000, "\nASSERT_EFI_ERROR (Status = %r)\n");
 v1 = InternalGetReportStatusCodeProtocol();
 if ( v1 )
 (*(void ( **)(const char *, int, const char *))(v1 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiHobLib\\HobLib.c",
 50,
 "!EFI_ERROR (Status)");
 }
 if ( !v5 )
 {
 v2 = InternalGetReportStatusCodeProtocol();
 if ( v2 )
 (*(void ( **)(const char *, int, const char *))(v2 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiHobLib\\HobLib.c",
 51,
 "HobList != ((void *) 0)");
 }
 return v5;
}

/**
 *Find next HOB of type 4 (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR).
 */
_WORD *GetNextHobByType(
 INTN a1,
 _WORD *a2
 )
{
 _WORD *v2; // esi int v3; // eax v2 = a2;
 if ( !a2 )
 {
 v3 = InternalGetReportStatusCodeProtocol();
 if ( v3 )
 (*(void ( **)(const char *, int, const char *))(v3 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiHobLib\\HobLib.c",
 82,
 "HobStart != ((void *) 0)");
 }
 while ( 1 )
 {
 if ( *v2 == 0xFFFF )
 return 0;
 if ( *v2 == 4 )
 break;
 v2 = (_WORD *)((char *)v2 + (unsigned __int16)v2[1]);
 }
 return v2;
}

/**
 *Get HOB by type and length.
 */
int GetHobByType(
 INTN n5,
 INTN n24
 )
{
 int v4; // eax int v5; // eax int v7; // [esp+0h] [ebp-10h]
 int v8; // [esp+Ch] [ebp-4h] BYREF v4 = InternalGetPeiServices();
 if ( (*(int ( **)(int, int, int, int *))(*(_DWORD *)v4 + 52))(v4, n5, n24, &v8) < 0 )
 v8 = 0;
 if ( !v8 )
 {
 v5 = InternalGetReportStatusCodeProtocol();
 if ( v5 )
 (*(void ( **)(const char *, int, const char *))(v5 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiHobLib\\HobLib.c",
 250,
 "Hob != ((void *) 0)");
 }
 return v8;
}

/**
 *Build a firmware volume HOB.
 *Creates HOB entry with FV address, info, and size (0x2000000).
 */
int BuildFvHob(
 UINTN FvAddress,
 INTN FvInfo
 )
{
 int result; // eax if ( InternalFvAlignmentCheck(FvAddress) )
 {
 result = GetHobByType(5, 24);
 if ( result )
 {
 *(_DWORD *)(result + 20) = 0;
 *(_DWORD *)(result + 8) = FvAddress;
 *(_DWORD *)(result + 12) = FvInfo;
 *(_DWORD *)(result + 16) = 0x2000000;
 }
 }
 else
 {
 result = InternalGetReportStatusCodeProtocol();
 if ( result )
 return (*(int ( **)(const char *, int, const char *))(result + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiHobLib\\HobLib.c",
 556,
 "((BOOLEAN)(0==1))");
 }
 return result;
}

//
// PEI Service Pool Management
//

/**
 *Allocate pool from PEI services.
 */
int PeiAllocatePool(
 VOID *this
 )
{
 int v2; // eax int v4; // [esp+4h] [ebp-4h] BYREF v2 = InternalGetPeiServices();
 if ( (*(int ( **)(int, void *, int *))(*(_DWORD *)v2 + 76))(v2, this, &v4) >= 0 )
 return v4;
 else return 0;
}

/**
 *Allocate pool and zero it.
 */
int PeiAllocateZeroPool(
 VOID *this
 )
{
 int result; // eax result = PeiAllocatePool(this);
 if ( result )
 return InternalZeroMemWithCheck(result, this);
 return result;
}

//
// PCD Protocol Access
//

/**
 *Get PCD PPI protocol.
 */
int PeiGetPcdProtocol(
 VOID *PeiServices
 )
{
 int v1; // eax int v2; // eax int v3; // eax int v5; // [esp+0h] [ebp-4h] BYREF v1 = InternalGetPeiServices();
 v5 = (int)&v5;
 v2 = (*(int ( **)(int, void *, _DWORD, _DWORD))(*(_DWORD *)v1 + 32))(v1, &unk_FFDB4124, 0, 0);
 if ( v2 < 0 )
 {
 v5 = v2;
 FpgaReportStatusCode(0x80000000, "\nASSERT_EFI_ERROR (Status = %r)\n");
 v3 = InternalGetReportStatusCodeProtocol();
 if ( v3 )
 (*(void ( **)(const char *, int, const char *))(v3 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiPcdLib\\PeiPcdLib.c",
 49,
 "!EFI_ERROR (Status)");
 }
 return v5;
}

//
// FPGA Configuration HOB Functions
//

/**
 *Get FPGA Configuration HOB.
 *Searches for gFpgaPlatformConfigHobGuid in existing HOBs.
 *If not found, creates a new FPGA config HOB with default values
 *and initializes from variable store if available.
 */
int FpgaGetConfigHob(
 INTN *this
 )
{
 int v3; // esi int v4; // esi unsigned int n4_1; // ebx _BYTE *v6; // eax int n4; // ecx _BYTE *v8; // edi char v9; // al if ( !this )
 return -2147483646;
 GetHobList();
 v3 = GetNextHobByType(0, (void *)v3);
 if ( v3 )
 {
 do
 {
 if ( (unsigned __int8)CompareGuid(&unk_FFDB4114, v3 + 8) )
 break;
 v3 = GetNextHobByType(0, (void *)v3);
 }
 while ( v3 );
 if ( v3 )
 {
 v4 = v3 + 24;
LABEL_8:
 *this = v4;
 return 0;
 }
 }
 FpgaReportStatusCode(0x80000000, "FPGA Configuration Get HOB-> HOB is not found, create it!\n");
 v4 = FpgaBuildConfigHob();
 if ( v4 )
 {
 FpgaReportStatusCode(0x80000000, "FPGA Configuration Get HOB-> create it worked, init it!\n");
 n4_1 = 0;
 *(_WORD *)(v4 + 5) = -256;
 *(_DWORD *)(v4 + 1) = 0;
 v6 = (_BYTE *)(v4 + 15);
 *(_WORD *)(v4 + 31) = 0;
 *(_BYTE *)(v4 + 37) = 0;
 n4 = 4;
 do
 {
 *(v6 - 8) = -1;
 *v6 = 11;
 v6[8] = -1;
 v6[12] = -1;
 *(v6 - 4) = 0;
 v6[18] = 0;
 ++v6;
 --n4;
 }
 while ( n4 );
 v8 = (_BYTE *)FpgaGetConfigVariable();
 if ( v8 )
 {
 FpgaReportStatusCode(0x80000000, "FPGA Configuration Get HOB-> Vaiable found use it!\n");
 *(_BYTE *)(v4 + 6) = *v8;
 *(_BYTE *)(v4 + 31) = v8[13];
 *(_BYTE *)(v4 + 32) = v8[14];
 *(_BYTE *)(v4 + 37) = v8[19];
 do
 {
 *(_BYTE *)(v4 + n4_1 + 23) = v8[n4_1 + 5];
 *(_BYTE *)(v4 + n4_1 + 27) = v8[n4_1 + 9];
 v9 = v8[n4_1 + 1];
 if ( v9 )
 {
 if ( v9 == -1 )
 *(_BYTE *)(n4_1 + v4 + 7) = -1;
 else
 *(_BYTE *)(n4_1 + v4 + 7) = v9 - 1;
 }
 *(_BYTE *)(v4 + n4_1 + 33) = v8[n4_1 + 15];
 ++n4_1;
 }
 while ( n4_1 < 4 );
 }
 *(_BYTE *)v4 = 1;
 goto LABEL_8;
 }
 FpgaReportStatusCode(0x80000000, "FPGA Configuration Get HOB-> HOB IS NULL, could not create!\n");
 return -2147483634;
}

/**
 *Build FPGA Configuration HOB entry.
 *Creates a HOB with type 4 (Resource Descriptor), subtype 62,
 *and copies GUID and configuration data.
 */
UINT8 *FpgaBuildConfigHob(
 VOID
 )
{
 int v0; // eax int v1; // esi char buf[40]; // [esp+4h] [ebp-28h] BYREF InternalZeroMemWithCheck((int)buf, 0x26u);
 v0 = GetHobByType(4, 62);
 v1 = v0;
 if ( !v0 )
 return 0;
 CopyGuid((_DWORD *)(v0 + 8), &unk_FFDB4114);
 if ( v1 == -24 )
 return 0;
 else return InternalCopyMem((char *)(v1 + 24), buf, 0x26u);
}

/**
 *Read FPGA Configuration from HOB into caller's buffer.
 */
int FpgaConfigGetHobValues(
 UINT8 *this
 )
{
 UINT8 *v3; // esi UINT8 *v4; // ecx UINT8 *v5; // edx char v6; // al int v7; // esi int n4; // edi UINT8 *v9; // [esp+4h] [ebp-4h] BYREF if ( FpgaGetConfigHob((INTN *)&v9) >= 0 )
 {
 v3 = v9;
 v4 = this + 7;
 v5 = v9 + 19;
 *(this + 2) = v9[2];
 *(this + 3) = v3[3];
 *(this + 4) = v3[4];
 *(this + 5) = v3[5];
 *(this + 6) = v3[6];
 *this = *v3;
 *(this + 1) = v3[1];
 *(this + 31) = v3[31];
 *(this + 32) = v3[32];
 v6 = v3[37];
 v7 = v3 - this;
 *(this + 37) = v6;
 n4 = 4;
 do
 {
 *v4 = v4[v7];
 v4[8] = *(v5 - 4);
 v4[12] = *v5;
 v4[16] = v5[4];
 v4[20] = v5[8];
 v4[4] = *(v5 - 8);
 v4[26] = v5[14];
 ++v4;
 ++v5;
 --n4;
 }
 while ( n4 );
 return 0;
 }
 else
 {
 FpgaReportStatusCode(0x80000000, (int)"FpgaConfigurationGetValues-> HOB error, return EFI_NOT_FOUND!\n");
 return -2147483634;
 }
}

/**
 *Write FPGA Configuration to HOB from caller's buffer.
 */
int FpgaConfigSetHobValues(
 UINT8 *this
 )
{
 UINT8 *v3; // ecx UINT8 *v4; // esi UINT8 *v5; // edx char v6; // al int v7; // edi int n4; // ecx UINT8 *v9; // [esp+4h] [ebp-4h] BYREF if ( FpgaGetConfigHob((INTN *)&v9) >= 0 )
 {
 v3 = v9;
 v4 = this + 19;
 v9[2] = *(this + 2);
 v5 = v3 + 7;
 v3[3] = *(this + 3);
 v3[4] = *(this + 4);
 v3[5] = *(this + 5);
 v3[6] = *(this + 6);
 v3[1] = *(this + 1);
 v3[31] = *(this + 31);
 v3[32] = *(this + 32);
 v6 = *(this + 37);
 v7 = this - v3;
 v3[37] = v6;
 n4 = 4;
 do
 {
 *v5 = v5[v7];
 v5[8] = *(v4 - 4);
 v5[12] = *v4;
 v5[16] = v4[4];
 v5[20] = v4[8];
 v5[4] = *(v4 - 8);
 v5[26] = v4[14];
 ++v5;
 ++v4;
 --n4;
 }
 while ( n4 );
 return 0;
 }
 else
 {
 FpgaReportStatusCode(0x80000000, (int)"FpgaConfigurationSetValues-> HOB error, return EFI_NOT_FOUND!\n");
 return -2147483634;
 }
}

/**
 *Get FPGA socket configuration variable.
 *Uses gFpgaPlatformVariableGuid vendor GUID, L"FpgaSocketConfig" variable name.
 */
INTN FpgaGetConfigVariable(
 VOID
 )
{
 int v0; // eax int v1; // eax int v2; // edi int v4; // esi int v5; // [esp+0h] [ebp-10h]
 int ( **v6)(_DWORD, const __int16 *, void *, _DWORD, int *, int); // [esp+8h] [ebp-8h] BYREF int n27; // [esp+Ch] [ebp-4h] BYREF n27 = 27;
 v0 = InternalGetPeiServices();
 (*(void ( **)(int, void *, _DWORD, _DWORD, int ( ***)(_DWORD, const __int16 *, void *, _DWORD, int *, int)))(*(_DWORD *)v0 + 32))(
 v0,
 &unk_FFDB4074,
 0,
 0,
 &v6);
 v1 = PeiAllocateZeroPool((void *)n27);
 v2 = v1;
 if ( v1
 && (v4 = (*v6)(v6, L"FpgaSocketConfig", &unk_FFDB40A4, 0, &n27, v1),
 FpgaReportStatusCode(0x80000000, (int)"FpgaGetVariable status = %r !\n", v4),
 v4 >= 0) )
 {
 return v2;
 }
 else
 {
 return 0;
 }
}

//
// FPGA Platform Hooks
//

/**
 *Get FPGA HSSI card ID via platform hooks PPI.
 *gFpgaPlatformHooksPpiGuid at 0xffdb4104.
 */
INTN FpgaGetHssiCardId(
 UINT8 *a1
 )
{
 int v6; // eax int v7; // eax int v8; // edi int v9; // eax int v10; // [esp+8h] [ebp-4h] BYREF if ( !a1 )
 return -2147483646;
 *a1 = -1;

 v6 = InternalGetPeiServices();
 v7 = (*(int ( **)(int, void *, _DWORD, _DWORD, int *))(*(_DWORD *)v6 + 32))(v6, &unk_FFDB4104, 0, 0, &v10);
 v8 = v7;
 if ( v7 < 0 )
 {
 FpgaReportStatusCode(0x80000000, (int)"\nASSERT_EFI_ERROR (Status = %r)\n", v7);
 v9 = InternalGetReportStatusCodeProtocol();
 if ( v9 )
 (*(void ( **)(const char *, int, const char *))(v9 + 4))(
 "e:\\hs\\PurleyPlatPkg\\Library\\FpgaPlatformHooksLib\\FpgaPlatformHooksLib.c",
 86,
 "!EFI_ERROR (Status)");
 }
 *a1 = (*(int ( **)(int))(v10 + 84))(a2);
 return v8;
}

/**
 *Get FPGA platform info (socket present, platform type).
 *Calls platform hooks PPI function at vfunc offset 76.
 *gFpgaPlatformHooksPpiGuid at 0xffdb4104.
 */
INTN FpgaGetPlatformInfo(
 INTN a1,
 UINT8 *a2,
 UINT8 *a3
 )
{
 int v5; // eax int v6; // eax int v7; // eax int v9; // [esp+0h] [ebp-10h]
 int v10; // [esp+Ch] [ebp-4h] BYREF if ( !a2 || !a3 )
 return -2147483646;
 *a2 = -1;
 *a3 = 0;

 v5 = InternalGetPeiServices();
 v6 = (*(int ( **)(int, void *, _DWORD, _DWORD, int *))(*(_DWORD *)v5 + 32))(v5, &unk_FFDB4104, 0, 0, &v10);
 if ( v6 < 0 )
 {
 FpgaReportStatusCode(0x80000000, (int)"\nASSERT_EFI_ERROR (Status = %r)\n", v6);
 v7 = InternalGetReportStatusCodeProtocol();
 if ( v7 )
 (*(void ( **)(const char *, int, const char *))(v7 + 4))(
 "e:\\hs\\PurleyPlatPkg\\Library\\FpgaPlatformHooksLib\\FpgaPlatformHooksLib.c",
 135,
 "!EFI_ERROR (Status)");
 }
 return (*(int ( **)(int, UINT8 *, UINT8 *))(v10 + 76))(a1, a2, a3);
}

//
// FV Info PPI Installation
//

/**
 *Install FV Info PPI.
 *Registers firmware volume with PEI infrastructure.
 */
INTN FpgaInstallFvInfoPpi(
 INTN a1,
 INTN a2
 )
{
 int buf; // eax _DWORD *buf_1; // esi int v5; // eax int v6; // eax _DWORD *v7; // edi int v8; // eax int v9; // eax int result; // eax int v11; // [esp+0h] [ebp-10h]

 buf = PeiAllocatePool((void *)0x20);
 buf_1 = (_DWORD *)buf;
 if ( !buf || (buf_1 = InternalZeroMemWithCheck(buf, 0x20u)) == 0 )
 {
 v5 = InternalGetReportStatusCodeProtocol();
 if ( v5 )
 (*(void ( **)(const char *, int, const char *))(v5 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiServicesLib\\PeiServicesLib.c",
 653,
 "FvInfoPpi != ((void *) 0)");
 }
 if ( a1 )
 {
 CopyGuid(buf_1, a1);
 }
 else
 {
 CopyGuid(buf_1, &unk_FFDB40D4);
 if ( !(unsigned __int8)CompareGuid(a2 + 16, &unk_FFDB40D4) )
 {
 v6 = InternalGetReportStatusCodeProtocol();
 if ( v6 )
 (*(void ( **)(const char *, int, const char *))(v6 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiServicesLib\\PeiServicesLib.c",
 678,
 "CompareGuid (&(((EFI_FIRMWARE_VOLUME_HEADER *) FvInfo)->FileSystemGuid), &gEfiFirmwareFileSystem2Guid)");
 }
 }
 buf_1[4] = a2;
 buf_1[5] = 0x2000000;
 v7 = (_DWORD *)PeiAllocatePool((void *)0xC);
 if ( !v7 )
 {
 v8 = InternalGetReportStatusCodeProtocol();
 if ( v8 )
 (*(void ( **)(const char *, int, const char *))(v8 + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiServicesLib\\PeiServicesLib.c",
 694,
 "FvInfoPpiDescriptor != ((void *) 0)");
 }
 v7[1] = &unk_FFDB40F4;
 *v7 = -2147483632;
 v7[2] = buf_1;
 v9 = InternalGetPeiServices();
 result = (*(int ( **)(int, _DWORD *))(*(_DWORD *)v9 + 24))(v9, v7);
 if ( result < 0 )
 {
 FpgaReportStatusCode(0x80000000, (int)"\nASSERT_EFI_ERROR (Status = %r)\n", result);
 result = InternalGetReportStatusCodeProtocol();
 if ( result )
 return (*(int ( **)(const char *, int, const char *))(result + 4))(
 "e:\\hs\\MdePkg\\Library\\PeiServicesLib\\PeiServicesLib.c",
 700,
 "!EFI_ERROR (Status)");
 }
 return result;
}

//
// FPGA BBS (Boot Bus Select) Initialization
//

/**
 *FPGA BBS Initialization.
 *Allocates memory, loads firmware volume from BIOS offset,
 *verifies FV signature, validates checksum, installs FV info PPI,
 *and builds FV HOB.
 */
INTN FpgaBbsInit(
 VOID *this
 )
{
 int v2; // eax int v3; // eax int v4; // esi int v6; // esi int v7; // edi int v8; // esi int v9; // [esp+14h] [ebp-Ch] BYREF int v10; // [esp+18h] [ebp-8h] BYREF FpgaReportStatusCode(0x80000000, "[FpgaBbsInit] Entry\n");
 v2 = InternalGetPeiServices();
 if ( (*(int ( **)(int, void *, _DWORD, _DWORD, int *))(*(_DWORD *)v2 + 32))(v2, &unk_FFDB4094, 0, 0, &v9) < 0 )
 {
 FpgaReportStatusCode(0x80000000, "\nASSERT_EFI_ERROR (Status = %r)\n");
 v3 = InternalGetReportStatusCodeProtocol();
 if ( v3 )
 (*(void ( **)(const char *, int, const char *))(v3 + 4))(
 "e:\\hs\\PurleyPlatPkg\\Platform\\Pei\\FpgaPlatformInit\\FpgaBbsInit.c",
 130,
 "!EFI_ERROR (Status)");
 }

 v4 = (*(int ( **)(void *, int, int, int *))(*(_DWORD *)this + 72))(this, 3, 0x2000, &v10);
 if ( v4 < 0 )
 {
 FpgaReportStatusCode(0x80000000, "[FpgaBbsInit] Allocate Memory failed.\n");
 return v4;
 }

 v6 = v10;
 v7 = (*(int ( **)(int, int, int, int, int))(v9 + 4))(v9, 16, 10485760, 0x2000000, v10);
 FpgaReportStatusCode(0x80000000, "[FpgaBbsInit] Load FV from BIOS offset %x status: %r\n");

 if ( v7 >= 0 && v6 )
 {
 if ( *(_DWORD *)(v6 + 40) != 0x48534646 ) // "FSFH" != FV_SIGNATURE
 {
 v8 = -2147483638;
LABEL_12:
 FpgaReportStatusCode(0x80000000, "[FpgaBbsInit] FPGA FV at address %x is corrupted: %r\n");
 return v8;
 }
 if ( (unsigned __int16)InternalCalculateCheckSum16(v6, *(unsigned __int16 *)(v6 + 48)) )
 {
 v8 = -2147483627;
 goto LABEL_12;
 }
 FpgaInstallFvInfoPpi(v6, 0);
 BuildFvHob(v6, 0);
 return 0;
 }
 else
 {
 FpgaReportStatusCode(0x80000000, "[FpgaBbsInit] Load FPGA FV failed.\n");
 return v7;
 }
}

//
// Module Entry Point
//

/**
 *FpgaPlatformEarlyInit entry point.
 *
 *Flow:
 *1. Report entry via status code
 *2. Read FPGA config values from HOB
 *3. Check socket presence bits
 *4. Locate MRC Hooks Chip Services PPI (gEfiPeiMrcHooksChipServicesPpiGuid)
 *5. If successful, locate Mp Services PPI (gEfiPeiMpServicesPpiGuid)
 *and call PcdGet(12)
 *6. On failure, report status code and assert
 */
EFI_STATUS EFIAPI ModuleEntryPoint(
 IN EFI_HANDLE ImageHandle,
 IN EFI_SYSTEM_TABLE *SystemTable
 )
{
 signed __int32 v3; // esi int v4; // eax int v5; // eax int v6; // [esp-6h] [ebp-44h]
 _BYTE v7[4]; // [esp+16h] [ebp-28h] BYREF FpgaReportStatusCode(0x80000000, "FpgaPlatformEarlyInit Entry! \n");
 v6 = FpgaConfigGetHobValues(v7);
 FpgaReportStatusCode(0x80000000, "FpgaConfigurationGetValues status = %r !\n");
 if ( v6 < 0 )
 return -2147483642; // EFI_UNSUPPORTED if ( !v7[0] || !v7[2] )
 return -2147483645; // EFI_NOT_FOUND FpgaReportStatusCode(0x80000000, "FpgaSktPresent is Set to 0x%X! \n");

 // Locate MRC Hooks Chip Services PPI v3 = (*(int ( **)(EFI_SYSTEM_TABLE *, void *, _DWORD, _DWORD, int *))(LODWORD(SystemTable->Hdr.Signature) + 32))(
 SystemTable,
 &unk_FFDB40E4,
 0,
 0,
 &dword_FFDB4148);

 if ( v3 >= 0 )
 {
 // Success: get PCD protocol and locate Mp Services PPI v5 = PeiGetPcdProtocol();
 dword_FFDB4140 = (*(int ( **)(int))(v5 + 16))(12);
 v3 = (*(int ( **)(EFI_SYSTEM_TABLE *, void *, _DWORD, _DWORD, int *))(LODWORD(SystemTable->Hdr.Signature) + 32))(
 SystemTable,
 &unk_FFDB40C4,
 0,
 0,
 &dword_FFDB4150);
 if ( !v3 )
 // Mp Services PPI found - continue to BBS init (jump target)
 // (The JUMPOUT at 0xffdb2597 goes to BBS init code)
 JUMPOUT(0xFFDB2597);
 FpgaReportStatusCode(0x80000000, "Find Mp services PPI failed, return it's error!\n");
 }
 else
 {
 // Failure: assert FpgaReportStatusCode(0x80000000, "Find MRC Hooks Chip Services Ppi failed, return it's error!\n");
 FpgaReportStatusCode(0x80000000, "\nASSERT_EFI_ERROR (Status = %r)\n");
 v4 = InternalGetReportStatusCodeProtocol();
 if ( v4 )
 (*(void ( **)(const char *, int, const char *))(v4 + 4))(
 "e:\\hs\\PurleyPlatPkg\\Platform\\Pei\\FpgaPlatformInit\\FpgaPlatformEarlyInit.c",
 280,
 "!EFI_ERROR (Status)");
 }
 return v3;
}