/* * IntelPhyCard.efi - Header file * Source: HR650X BIOS PE file 0101 (IntelPhyCard.efi) * Contains function declarations and global externs for the OCP/PHY driver */ #ifndef __INTELPHYCARD_H__ #define __INTELPHYCARD_H__ #include <Uefi.h> // EFI global protocol handles extern EFI_HANDLE gImageHandle; extern EFI_SYSTEM_TABLE *gSystemTable; extern EFI_BOOT_SERVICES *gBS; extern EFI_RUNTIME_SERVICES *gRT; // Function declarations // Entry point EFI_STATUS EFIAPI ModuleEntryPoint ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable ); // Main initialization __int64 sub_480(__int64 ImageHandle, __int64 a2); // OCP PHY/MAC driver functions __int64 sub_E14(void); void sub_18A0(void); char sub_1844(void); // SPI Flash / I2C functions char __fastcall sub_234C(__int64 a1, __int64 a2, _DWORD *a3); char __fastcall sub_2C94(__int64 a1, __int64 *a2); char __fastcall sub_2FD4(__int64 a1, __int64 *a2); char __fastcall sub_2BC0(__int64 a1, __int64 *a2); char __fastcall sub_3788(__int64 a1, __int64 *a2); signed __int64 __fastcall sub_2638(int a1); __int64 __fastcall sub_2E7C(unsigned int a1); char __fastcall sub_216C(__int64 a1, int *p_n24608); char __fastcall sub_1EA4(__int64 a1, __int64 a2, unsigned int n2, char a4); unsigned __int64 __fastcall sub_1F90(int a1, unsigned int *a2); __int64 __fastcall sub_1DF8(char a1, char a2); char *__fastcall sub_3A00(char *dst, char *src, unsigned __int64 n); // Debug/Assert/Utility functions __int64 sub_1AD8(void); __int64 __fastcall sub_1A50(__int64 a1, const char *a2, ...); __int64 __fastcall sub_1A98(__int64 a1, __int64 a2, __int64 a3); __int64 __fastcall sub_2784(__int64 a1); __int64 __fastcall sub_1CAC(__int64 a1); unsigned __int32 __fastcall sub_1950(unsigned __int16 Port); __int64 __fastcall sub_3960(unsigned int _RAX_1, _DWORD *a2, _DWORD *a3, _DWORD *a4, _DWORD *a5); // Global data extern UINT64 qword_4A20; // PciExpress MMIO base extern UINT64 qword_4AD0; // Flash base address extern UINT64 qword_4B50; // gST (System Table) extern UINT64 qword_4B58; // gBS (Boot Services) extern UINT64 qword_4B68; // gRT (Runtime Services) extern UINT64 qword_4B78; // PCD protocol extern UINT64 qword_4B80; // gDS (DXE Services) extern UINT64 qword_4B88; // mMmPciBase extern UINT64 qword_4B98; // PciExpress base address extern UINT64 qword_4B40; // Protocol handle extern UINT64 qword_4C00; // Flash size extern UINT64 qword_4C10; // Flash info extern UINT64 qword_4C18; // Flash info extern UINT64 qword_4C28; // SPI controller protocol extern UINT32 n24608; // Flash JEDEC ID extern UINT32 n0x1000000; // Flash total size extern UINT32 dword_4CC0; // MAC address (bytes 0-3) extern UINT16 word_4CC4; // MAC address (bytes 4-5) extern UINT8 byte_4AA8; // Flag byte extern UINT8 byte_4AE4; // Flag byte extern UINT8 byte_4AFC; // Flag byte extern UINT8 byte_4C08; // Flag byte #endif /* __INTELPHYCARD_H__ */