IntelPhyCard

Index: 0101
PE File: IntelPhyCard.efi
Size: 20,736 bytes (0x5100)
SHA256: 26cebf250a2c18b4919fcbb98bd880d33dc9ac5ba0dab243e2bee1d071e8907a
Phase: DXE (Driver Execution Environment)
Source: LenovoServerPkg/IntelPhyCard

Overview

IntelPhyCard manages the Intel Physical Card (IntelPHY / OCP) mezzanine network card detection, SPI flash programming, and MAC address provisioning. It detects OCP (Open Compute Project) mezzanine card presence via the "OCP_TypeC" UEFI variable, reads MAC addresses from the card's FRU (Field Replaceable Unit) EEPROM, validates them, and writes valid MAC addresses to NVRAM ("LBG_LAN_Mac"). It also contains an extensive SPI flash driver supporting detection, identification, read, write, and erase operations across multiple flash vendors and part families. The SPI flash subsystem is registered via a function pointer dispatch table and supports Winbond, MXIC, SST, ATMEL, XMC, Spansion, EON, GigaDevice, ISSI, STM/Micron/Numonyx, AMIC, FIDELIX, ESMT, Fudan, PMC, and other flash memory parts.

Key Functions

Function	Address	Purpose
ModuleEntryPoint	0x3E0	UEFI entry point; detects OCP presence, calls sub_E14 if present, registers ReadyToBoot callback
sub_480	0x480	Full driver initialization; DXE services, MM PCI base, PCD, flash detection
sub_E14	0xE14	OCP card provisioning: MAC address read from FRU, validation, NVRAM write, SPI flash programming
sub_18A0	0x18A0	UpdateOCPCardStatus callback; reads OCP_TypeC variable, triggers reset on connect
sub_1844	0x1844	Read OCP_TypeC UEFI variable to detect OCP card presence
sub_2BC0	0x2BC0	SPI flash detection for SST 25LF040/25LF080
sub_2C94	0x2C94	SPI flash detection for ADESTO/Micron/ATMEL parts (AT25SF641, AT25SL128A, 26DF series)
sub_2FD4	0x2FD4	SPI flash detection for XMC, Winbond, AMIC, MXIC, ISSI, GigaDevice, EON, Spansion, STM, Fudan, ESMT, PMC parts
sub_3788	0x3788	SPI flash detection for ESMT 25L series and SST 25VF series
sub_216C	0x216C	SPI flash JEDEC ID read and chip identification
sub_234C	0x234C	SPI flash page program/write with erase and verification
sub_2638	0x2638	SPI flash sector erase with status polling
sub_1F90	0x1F90	SPI flash address mapping and size calculation
sub_1DF8	0x1DF8	SPI flash command/status register control
sub_1CAC	0x1CAC	PCIe MMIO address translation (PCI Express register access)
sub_3960	0x3960	CPUID wrapper

Protocols/Dependencies

PCD_PROTOCOL -- PCD access for PciExpressBaseAddress and platform tokens
DXE_SERVICES_TABLE -- DXE services via configuration table lookup
MM_PCI_BASE_PROTOCOL -- MMIO PCI base
EFI_RUNTIME_SERVICES -- Variable services (SetVariable, GetVariable) for OCP_TypeC, LBG_LAN_Mac
IPMI Transport Protocol -- Power cycle signaling after OCP card detection
PCIe MMIO -- Direct SPI flash controller register access

Platform

HR650X (Lenovo ThinkSystem) -- X64 UEFI DXE driver. Compiled with VS2015, debug path HR6N0XMLK\DEBUG_VS2015\X64\LenovoServerPkg\IntelPhyCard. Supports 4 OCP MAC addresses with FRU validation and fallback to direct MAC read. SPI flash subsystem supports sector sizes of 256, 4096, and 65536 bytes.