| Address | Name | Description |
|---|---|---|
| LibConstructor | ||
| LegacyInterruptInstall | ||
| LegacyInterruptGetStatus | ||
| LegacyInterruptGetVector | ||
| LegacyInterruptReadVector | ||
| LegacyInterruptWriteVector | ||
| LpcWriteRegister | ||
| DebugPrint | ||
| DebugAssert | ||
| IoRead16 | ||
| EfiGetSystemConfigurationTable | ||
| MmPciReadConfig | ||
| CompareGuid | ||
| PchGetStepping | ||
| ReadUnaligned64 | ||
| LegacyInterruptEntryPoint | ||
| GUID | definitions used by this module | |
| 0x12c0 | - Unknown vendor GUID | |
| 0x12d0 | - gMmPciUsraProtocolGuid (from CpRcPkg/DxeMmPciBaseLib) | |
| 0x12e0 | - gEfiPcdProtocolGuid (11B34006-D85B-4D0A-A290-D5A571310EF7) | |
| 0x12f0 | - gEfiLegacyInterruptProtocolGuid (31CE593D-108A-485D-ADB2-78F21F2966BE) | |
| 0x1300 | - gEfiHobListGuid (7739F24C-93D7-11D4-9A3A-0090273FC14D) | |
| 0x1310 | - gEfiDxeServicesTableGuid (05AD34BA-6F02-4214-952E-4DA0398E2BB9) | |
| Function | pointer table for LegacyInterrupt protocol | |
| STATIC | CONST LEGACY_INTERRUPT_PROTOCOL_INSTANCE mLegacyInterruptInterface = { | |
| offset | 0x1320 -> 0x638 | |
| offset | 0x1328 -> 0x640 | |
| offset | 0x1330 -> 0x650 | |
| offset | 0x1338 -> 0x680 | |
| Global | state variables | |
| 0x1340 | - mPchStepping (UINT8, initially 3 = PCH_STEPPING_UNKNOWN) | |
| 0x1348 | - Protocol image handle (initially NULL) | |
| STATIC | UINT8 mPchStepping = PCH_STEPPING_UNKNOWN; | |
| Library | constructor - initializes UEFI boot/libraries | |
| EFI_STATUS | EFIAPI | |
| Save | globals | |
| Get | DxeServicesTable from system configuration | |
| Locate | MmPciUsra protocol (for PCI config access via MMIO) | |
| Get | HOB list | |
| Get | PCD protocol | |
| Read | PCD: PcdLegacyInterruptPchStepping (token=5) | |
| Install | the LegacyInterrupt protocol | |
| EFI_STATUS | LegacyInterruptInstall ( | |
| Check | if protocol already installed | |
| Install | protocol interface | |
| PIC | mode, 8 IRQ lines active | |
| Default | IRQ0 | |
| All | IRQs level-triggered (bitmask: IRQ0-IRQ4) | |
| Active | high | |
| Read | from LPC interrupt control register | |
| Write | to LPC register via MMIO | |
| VOID | LpcWriteRegister ( | |
| Call | PCH detection (lazy init) | |
| Write | MMIO register in LPC bridge space | |
| Get | the DebugOutput protocol instance (lazy init) | |
| VOID | * | |
| Debug | print function with board/platform detection | |
| UINT8 | DebugPrint ( | |
| Read | CMOS status for board detection | |
| Debug | assert handler | |
| VOID | DebugAssert ( | |
| Read | 16-bit value from I/O port | |
| Get | system configuration table by GUID | |
| EFI_STATUS | EfiGetSystemConfigurationTable ( | |
| MMIO | PCI config read (via MmPciUsra protocol) | |
| UINT32 | MmPciReadConfig ( | |
| Base | address | |
| Bus | 0 | |
| Device | 0x20, Func 0 | |
| Call | into MmPciUsra protocol | |
| Get | HOB list pointer | |
| Get | PCD protocol pointer | |
| Compare | two GUIDs (via unaligned 64-bit read) | |
| BOOLEAN | CompareGuid ( | |
| Read | as 64-bit values (handles unaligned) | |
| Determine | PCH stepping based on LPC device ID | |
| UINT8 | PchGetStepping ( | |
| Read | LPC device ID via MMIO PCI config | |
| Check | if LP-series | |
| Bit | test: LPC device IDs matching LP | |
| Read | unaligned 64-bit value | |
| UINT64 | ReadUnaligned64 ( | |
| Driver | entry point |
Generated by HR650X BIOS Decompilation Project