| Address | Name | Description | |
|---|---|---|---|
| ReadUnaligned64 | |||
| DebugClearMemory | |||
| DebugPrint | |||
| DebugAssert | |||
| HobGuidMatch | |||
| IoOrMemWrite | |||
| UartInitConfigRegisters | |||
| SioUartRegisterSetup | |||
| InitPchRcConfiguration | |||
| SioSetupRegisterDevice | |||
| SmmRuntimeServicesNotify | |||
| LegacySerialRedirectionRegister | |||
| LegacySerialRedirectionUnregister | |||
| SmmReadyToBootCallbackRegister | |||
| SmmSwDispatch2Callback | |||
| SmmBase2Communicate | |||
| LegacySredirDriverEntryPoint | |||
| Global | Variables | ||
| UEFI | Boot/Runtime Services Table pointers | ||
| EFI_BOOT_SERVICES | *gBS; // 0x2400 | ||
| 0x2408 | EFI_SYSTEM_TABLE *gST; // 0x2410 | ||
| SIO | Protocol interface (resolved from protocol GUID at 0x2260) | ||
| Used | for Super I/O register access via PCI configuration space. | ||
| VOID | *gSioProtocol; // 0x2390 | ||
| SMM | protocols | ||
| VOID | *gSmmSwDispatch2Protocol; // 0x2378 - GUID 0x2290 | ||
| 0x23C0 | - GUID 0x22E0 | ||
| 0x23B0 | - GUID 0x2280 | ||
| Debug | Mask protocol (GUID at .rdata 0x2240) | ||
| VOID | *gDebugMaskProtocol; // 0x23F0 | ||
| SIO | data pointer and size (returned from SIO protocol Open at 3:7:9) | ||
| VOID | *gSioDataPtr; // 0x2380 | ||
| 0x2368 | // | ||
| HOB | list pointer (from DXE HOB Library) | ||
| VOID | *gHobList; // 0x23F8 | ||
| SMM | communication buffer (32 bytes, allocated at entry) | ||
| VOID | *gCommunicationBuffer; // 0x2388 | ||
| SIO | PCI MMIO base address (calculated from PCI BAR) | ||
| UINT64 | gSioPciMmioBase; // 0x2438 | ||
| SIO | MMIO address and limit (from InitPchRcConfiguration) | ||
| UINT64 | gSioMmioAddress; // 0x23B8 | ||
| UART | Configuration structure (44 bytes at 0x2440) | ||
| SIO_UART_CONFIG | gUartConfig; | ||
| Default | baud rate reference (1843200 = 115200 * 16) | ||
| UINTN | gDefaultBaudRate; // 0x23A0 | ||
| State | flags | ||
| BOOLEAN | gSioSetupDone; // 0x2398 | ||
| 0x2399 | BOOLEAN gPchRcConfigured; // 0x2371 | ||
| 0x2370 | BOOLEAN gInitDone; // 0x2360 | ||
| UART | configuration flags (bitfield) | ||
| UINT32 | gUartConfigFlags; // 0x239C | ||
| Extra | UART config fields | ||
| UINT16 | gWord2444; // 0x2444 | ||
| GUID | structures for HOB matching | ||
| EFI_GUID | gHobGuid1; // 0x22F0 | ||
| 0x22F8 | //============================================================================= | ||
| Utility | Functions | ||
| Forward | to DebugMaskProtocol DebugPrint handler | ||
| Call | DebugMaskProtocol.AssertCallback (at offset 8) | ||
| Hardware | I/O Helpers | ||
| Parses | serial config from variable data (baud, data bits, stop | ||
| Sets | gUartConfigFlags, gUartConfig, gXmmword2450, gQword2460 | ||
| gDword2468 | register width field. | ||
| return | EFI_SUCCESS; | ||
| Set | Divisor Latch Access Bit (DLAB = 0x80) | ||
| Write | divisor low/high, then clear DLAB | ||
| if | (Config->DataBuffer != NULL) { | ||
| if | (Config->RegisterWidth == 4) { | ||
| Direct | I/O port write | ||
| IoWrite8 | ((UINT16)Config->IoPort + 3, 0x80); | ||
| If | loc_40E is 0, return EFI_NOT_STARTED. | ||
| Attempt | to read the "PchRcConfiguration" variable (size 1495). | ||
| If | variable has config bytes 83 and 197 set to 1: | ||
| Calculate | gSioPciMmioBase = gSioMmioAddress + (UINT16)(gSioMmioAddress + 11) | ||
| Copy | UART config from MMIO to gUartConfig | ||
| Open | PCI config space at offset 8 | ||
| Status | = gSioProtocol->OpenPciConfig (8, &Offset); | ||
| Search | for $SBC signature, write config | ||
| for | (SearchPtr = Offset; SearchPtr < 0xF0000; SearchPtr++) { | ||
| Write | back the offset | ||
| Status | = gSioProtocol->WritePciConfig (8, &Offset); | ||
| Search | for $SBF signature, write same config | ||
| Close | PCI config space | ||
| Build | notification GUID | ||
| Main | Driver Functions | ||
| Locate | SMM SW Dispatch 2 Protocol | ||
| if | (gSmmSwDispatch2Protocol == NULL) { | ||
| if | (!gInitDone) { | ||
| Setup | SIO UART registers and register with SMM SW Dispatch 2 | ||
| if | **(!gSmmReadyToBootRegistered | ** | |
| Register | first SMI handler | ||
| Register | second SMI handler (different SwSmiInputValue) | ||
| Use | unregister action (SwSmiConfig[0] = 2) | ||
| ZeroMem | (SwSmiConfig, sizeof (SwSmiConfig)); | ||
| Invoke | the ReadyToBoot callback immediately | ||
| return | ((EFI_STATUS ()(VOID ))gSmmReadyToBootProtocol)(gSmmReadyToBootProtocol); | ||
| Check | if in SMM and SMM state != 3 | ||
| Status | = gSmmBase2Protocol->InSmm (&InSmm); | ||
| Register | ReadyToBoot callback | ||
| return | SmmReadyToBootCallbackRegister (); | ||
| Entry | Point | ||
| Save | protocol pointers | ||
| gST | = SystemTable; | ||
| Allocate | SMM communication buffer (32 bytes, EfiReservedMemoryType) | ||
| Status | = gBS->AllocatePool ( | ||
| Locate | SIO Protocol (open with params 3, 7, 9) | ||
| Status | = gBS->LocateProtocol (&gSioProtocolGuid, NULL, &gSioProtocol); | ||
| Register | protocol notification for SMM Ready To Boot | ||
| Registration | = NULL; | ||
| Register | SMM Base 2 periodic callback via SetTimer (period = 8) | ||
| Status | = gBS->SetTimer ( | ||
| Register | protocol notification for SMM SW Dispatch 2 | ||
| Status | = gBS->RegisterProtocolNotify ( | ||
| Register | protocol notification for SMM Dispatch 2 data | ||
| _ModuleEntryPoint | (DXE standard entry, supplied by lib) | ||
| Provided | by UefiBootServicesTableLib + UefiRuntimeServicesTableLib. | ||
| Initializes | ImageHandle, gST, gBS, gRT globals, calls GetSystemHobList | ||
| then | invokes LegacySredirDriverEntryPoint. |
Generated by HR650X BIOS Decompilation Project