MeUma

Overview

MeUma (ME Unified Memory Allocation) validates and installs the ME UMA PPI to communicate UMA parameters between the ME subsystem and the host BIOS during the PEI phase. It reads UMA base addresses and sizes from PCI config space (ME device registers at 0xF0/0xF4), compares them with values stored in HOBs, validates the size is within 64 MB and 2 MB-aligned, then installs the PPI. It also includes HECI messaging for ME communication and detailed performance logging.

Key Functions

• MeUmaValidateLocation -- Validates UMA base/size against 2 MB alignment and 64 MB limit.
• PeiServicesLocator -- Locates PEI services PPI.
• HeciSendMessage -- Sends HECI message to the ME subsystem.
• GetMeSpsPolicy -- Retrieves SPS policy via PPI.
• GetOnBoardMeType / IsMeTypeNormal -- ME type detection.
• GetMeFs1FromHob -- Reads ME Firmware Status register from HOB.
• PciCfgRead -- PCI configuration space read for ME registers.
• PeiPerfInit / PeiPerfLogEntry / PeiPerfLogEnd -- Performance measurement.
• IsDfxFlow -- PCH PMC DWR (Debug Warranty Reset) bit check.
• IoRead16 / IoWrite16 / IoRead32 -- Port I/O for debug and delay.

Dependencies

• ME HECI PPI
• Boot Mode PPI
• PCH PMC (Power Management Controller)
• PCI Config Space (ME device registers 0xF0-0xF4)
• PEI Services (HOB, PPI, PCD access)
• SPS (Server Platform Services) Policy PPI

Platform

• Architecture: IA32 (x86, PE32)
• Source: PurleySktPkg/Me/Heci/MeUma/MeUma.c
• Image base: 0xFFD9FCB4
• PCH: Lewisburg (LBG) / Intel ME 4.x
• ME Register Base: PCI config offset 0xF0 (UMA Base), 0xF4 (UMA Size)