/** @file
OemErrorLogDxe.h -- Header for OemErrorLogDxe
Copyright (c) HR650X BIOS Decompilation Project
**/
#ifndef __OEMERRORLOGDXE_H__
#define __OEMERRORLOGDXE_H__
#include "../uefi_headers/Uefi.h"
//
// Function Prototypes
//
EFI_STATUS
EFIAPI
CpuId(
VOID
);
EFI_STATUS
EFIAPI
ReadUnaligned64Wrapper(
VOID
);
EFI_STATUS
EFIAPI
CompareGuidByQwords(
VOID
);
EFI_STATUS
EFIAPI
FreePoolChecked(
VOID
);
EFI_STATUS
EFIAPI
DebugAssertWorker(
VOID
);
EFI_STATUS
EFIAPI
DebugPrintWrapper(
VOID
);
EFI_STATUS
EFIAPI
DebugPrintCmosAware(
VOID
);
EFI_STATUS
EFIAPI
LocateIpmiTransport(
VOID
);
EFI_STATUS
EFIAPI
GetBmcLogBus(
VOID
);
EFI_STATUS
EFIAPI
ApCollectCpuInfo(
VOID
);
EFI_STATUS
EFIAPI
OemCheckCpuInfoNotify(
VOID
);
EFI_STATUS
EFIAPI
OemErrorLogDxeLibConstructor(
VOID
);
EFI_STATUS
EFIAPI
OemErrorLogDxeEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
global protocol/table pointers(
VOID
);
EFI_STATUS
EFIAPI
gImageHandle = NULL;(
VOID
);
EFI_STATUS
EFIAPI
globals(
VOID
);
EFI_STATUS
EFIAPI
*gMpService = NULL; // qword_1698(
VOID
);
EFI_STATUS
EFIAPI
UINT32 *gSteppingValues = NULL; // qword_1688(
VOID
);
EFI_STATUS
EFIAPI
VOID *gHobList = NULL; // qword_16C8(
VOID
);
EFI_STATUS
EFIAPI
VOID *gDebugPrintProtocol = NULL; // qword_16C0(
VOID
);
EFI_STATUS
EFIAPI
at 0x16D8(
VOID
);
EFI_STATUS
EFIAPI
definitions (from .data section at 0x1640)(
VOID
);
EFI_STATUS
EFIAPI
= { 3FDDA605-A76E-4F46-AD29-12F4531B3D08 }(
VOID
);
EFI_STATUS
EFIAPI
at 0x1650 = { 36232936-0E76-31C8-A13A-3AF2FC1C3932 } (EFI_HOB_LIST_GUID)(
VOID
);
EFI_STATUS
EFIAPI
at 0x1660 (unk_1660) = { 4A1D0E66-5271-4E22-83FE-90921B748213 } (gEfiIpmiTransportGuid)(
VOID
);
EFI_STATUS
EFIAPI
if running in SMM or similar restricted context (< 0x10 pages free)(
VOID
);
EFI_STATUS
EFIAPI
(gBootServices->GetBootMode () == BOOT_ON_S3_RESUME) {(
VOID
);
EFI_STATUS
EFIAPI
current debug level from CMOS(
VOID
);
EFI_STATUS
EFIAPI
(0x70, (IoRead8 (0x70) & 0x80) | 0x4B);(
VOID
);
EFI_STATUS
EFIAPI
= (*(volatile UINT8 *)(UINTN)0xFDAF0490) & 2 | 1;(
VOID
);
EFI_STATUS
EFIAPI
))(
VOID
);
EFI_STATUS
EFIAPI
NULL(
VOID
);
EFI_STATUS
EFIAPI
command data structures for CPU mismatch SEL(
VOID
);
EFI_STATUS
EFIAPI
= BIOS(
VOID
);
EFI_STATUS
EFIAPI
UINT8 SensorType; // 0x02 = Processor(
VOID
);
EFI_STATUS
EFIAPI
UINT8 EventDirType; // Event Dir (bit 7) | Event Type(
VOID
);
EFI_STATUS
EFIAPI
= OEM specific / Sensor-specific offset(
VOID
);
EFI_STATUS
EFIAPI
= OEM byte(
VOID
);
EFI_STATUS
EFIAPI
IPMI command 0x2E (0x46, 0x01) to IPMI transport(
VOID
);
EFI_STATUS
EFIAPI
= NULL; // command data: {0x02}, length 1(
VOID
);
EFI_STATUS
EFIAPI
0, // LUN(
VOID
);
EFI_STATUS
EFIAPI
(UINT8 *)IpmiCmd(
VOID
);
EFI_STATUS
EFIAPI
length(
VOID
);
EFI_STATUS
EFIAPI
= NULL;(
VOID
);
EFI_STATUS
EFIAPI
variable GUID(
VOID
);
EFI_STATUS
EFIAPI
284 in Setup variable = BMC bus(
VOID
);
EFI_STATUS
EFIAPI
current processor number from MP services(
VOID
);
EFI_STATUS
EFIAPI
microcode version from MSR 0x8B(
VOID
);
EFI_STATUS
EFIAPI
(0x8B, 0);(
VOID
);
EFI_STATUS
EFIAPI
stepping from CPUID (EAX[3:0] after CPUID leaf 1)(
VOID
);
EFI_STATUS
EFIAPI
(gSteppingValues != NULL) {(
VOID
);
EFI_STATUS
EFIAPI
frequency from MSR 0xCE (Platform Info MSR)(
VOID
);
EFI_STATUS
EFIAPI
(gFrequencies != NULL) {(
VOID
);
EFI_STATUS
EFIAPI
1 of MSR 0xCE contains the max non-turbo ratio in 100 MHz units(
VOID
);
EFI_STATUS
EFIAPI
= gBootServices->LocateProtocol ((
VOID
);
EFI_STATUS
EFIAPI
for watchdog timer(
VOID
);
EFI_STATUS
EFIAPI
= AllocatePoolOrNull (BufferSize);(
VOID
);
EFI_STATUS
EFIAPI
(NULL);(
VOID
);
EFI_STATUS
EFIAPI
NULL, // WaitEvent(
VOID
);
EFI_STATUS
EFIAPI
(infinite)(
VOID
);
EFI_STATUS
EFIAPI
NULL // FailedCpuList(
VOID
);
EFI_STATUS
EFIAPI
= FALSE;(
VOID
);
EFI_STATUS
EFIAPI
(gMicrocodeVersions != NULL) {(
VOID
);
EFI_STATUS
EFIAPI
(MicrocodeMismatch || FrequencyMismatch || SteppingMismatch) {(
VOID
);
EFI_STATUS
EFIAPI
BMC bus for SEL(
VOID
);
EFI_STATUS
EFIAPI
= GetBmcLogBus (&BusValue);(
VOID
);
EFI_STATUS
EFIAPI
IPMI SEL record(
VOID
);
EFI_STATUS
EFIAPI
SelRecord.EvMRevision = 0x04;(
VOID
);
EFI_STATUS
EFIAPI
SelRecord.SensorNumber = 0x72;(
VOID
);
EFI_STATUS
EFIAPI
Dir | Event Type(
VOID
);
EFI_STATUS
EFIAPI
specific(
VOID
);
EFI_STATUS
EFIAPI
4: microcode(
VOID
);
EFI_STATUS
EFIAPI
0: frequency(
VOID
);
EFI_STATUS
EFIAPI
3: stepping(
VOID
);
EFI_STATUS
EFIAPI
byte(
VOID
);
EFI_STATUS
EFIAPI
IPMI command (NetFn=0x0A, Cmd=0x44) to add SEL entry(
VOID
);
EFI_STATUS
EFIAPI
= sizeof (ResponseData);(
VOID
);
EFI_STATUS
EFIAPI
0x44, // Command: Add SEL Entry(
VOID
);
EFI_STATUS
EFIAPI
global pointers(
VOID
);
EFI_STATUS
EFIAPI
= ImageHandle;(
VOID
);
EFI_STATUS
EFIAPI
HOB list(
VOID
);
EFI_STATUS
EFIAPI
();(
VOID
);
EFI_STATUS
EFIAPI
IPMI transport protocol to prepare for SEL logging(
VOID
);
EFI_STATUS
EFIAPI
not available yet; register for protocol notification(
VOID
);
EFI_STATUS
EFIAPI
= gBootServices->RegisterProtocolNotify ((
VOID
);
EFI_STATUS
EFIAPI
(EFI_EVENT)(UINTN)LocateIpmiTransport(
VOID
);
EFI_STATUS
EFIAPI
UEFI globals and construct library(
VOID
);
EFI_STATUS
EFIAPI
= OemErrorLogDxeLibConstructor (ImageHandle, SystemTable);(
VOID
);
EFI_STATUS
EFIAPI
the CPU check notification via MP services protocol notify(
VOID
);
EFI_STATUS
EFIAPI
immediately after registration for already-present protocol(
VOID
);
EFI_STATUS
EFIAPI
(NULL, NULL);(
VOID
);
#endif /* __OEMERRORLOGDXE_H__ */