/** @file
  OemPlatformDxePhase.h -- Header for OemPlatformDxePhase

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __OEMPLATFORMDXEPHASE_H__
#define __OEMPLATFORMDXEPHASE_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
ReadUnaligned64(
  VOID
);

EFI_STATUS
EFIAPI
CompareGuid(
  VOID
);

EFI_STATUS
EFIAPI
DebugPrint(
  VOID
);

EFI_STATUS
EFIAPI
DebugAssert(
  VOID
);

EFI_STATUS
EFIAPI
InternalGetDxeServicesTable(
  VOID
);

EFI_STATUS
EFIAPI
OemPlatformCheckAndLogDimms(
  VOID
);

EFI_STATUS
EFIAPI
OemPlatformDxePhaseInitialize(
  VOID
);

EFI_STATUS
EFIAPI
ModuleEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
Data(
  VOID
);

EFI_STATUS
EFIAPI
follow the UEFI standard library pattern for boot services table libs.(
  VOID
);

EFI_STATUS
EFIAPI
in comments reference the .data section in the original PE image.(
  VOID
);

EFI_STATUS
EFIAPI
buffers used by CopyMem (internal)(
  VOID
);

EFI_STATUS
EFIAPI
char  DstBuffer[0x48];   // @ 0x1500: destination buffer (72 bytes)(
  VOID
);

EFI_STATUS
EFIAPI
Functions(
  VOID
);

EFI_STATUS
EFIAPI
with Dst after Src: copy backwards(
  VOID
);

EFI_STATUS
EFIAPI
(Dst, Src, Count);(
  VOID
);

EFI_STATUS
EFIAPI
= Count >> 3;(
  VOID
);

EFI_STATUS
EFIAPI
that (Count - 1) does not overflow the address space(
  VOID
);

EFI_STATUS
EFIAPI
either destination or source.(
  VOID
);

EFI_STATUS
EFIAPI
((Count - 1) > (UINT64)(-1) - (UINT64)Dst) {(
  VOID
);

EFI_STATUS
EFIAPI
Output Functions(
  VOID
);

EFI_STATUS
EFIAPI
too small or failed - skip protocol lookup(
  VOID
);

EFI_STATUS
EFIAPI
NULL;(
  VOID
);

EFI_STATUS
EFIAPI
the debug level from CMOS register 0x4B(
  VOID
);

EFI_STATUS
EFIAPI
= __inbyte (CMOS_INDEX_PORT);(
  VOID
);

EFI_STATUS
EFIAPI
CMOS debug level(
  VOID
);

EFI_STATUS
EFIAPI
(CmosDebugLevel > 3) {(
  VOID
);

EFI_STATUS
EFIAPI
} else {(
  VOID
);

EFI_STATUS
EFIAPI
}(
  VOID
);

EFI_STATUS
EFIAPI
the message ErrorLevel matches the filter, forward to protocol(
  VOID
);

EFI_STATUS
EFIAPI
((FilterMask & ErrorLevel) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
Table and HOB Services(
  VOID
);

EFI_STATUS
EFIAPI
configuration table entry is 24 bytes:(
  VOID
);

EFI_STATUS
EFIAPI
to next HOB using the length field(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT16 *)((UINT8 *)HobStart + HobLength);(
  VOID
);

EFI_STATUS
EFIAPI
Protocol Services(
  VOID
);

EFI_STATUS
EFIAPI
SEL Logging for Disabled DIMMs(
  VOID
);

EFI_STATUS
EFIAPI
the SEL record command frame(
  VOID
);

EFI_STATUS
EFIAPI
the memory topology HOB(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT16 *)GetHobList ();(
  VOID
);

EFI_STATUS
EFIAPI
topology data starts at offset +5346 from the HOB structure(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT8 *)CurrentHob + MEM_HOB_BASE_OFFSET;(
  VOID
);

EFI_STATUS
EFIAPI
over 10 sockets(
  VOID
);

EFI_STATUS
EFIAPI
(Socket = 0; Socket < MAX_SOCKETS; Socket++) {(
  VOID
);

EFI_STATUS
EFIAPI
channels per socket(
  VOID
);

EFI_STATUS
EFIAPI
(Channel = 0; Channel < MAX_CHANNELS; Channel++) {(
  VOID
);

EFI_STATUS
EFIAPI
DIMMs per channel(
  VOID
);

EFI_STATUS
EFIAPI
(Dimm = 0; Dimm < MAX_DIMMS; Dimm++) {(
  VOID
);

EFI_STATUS
EFIAPI
is present - check if enabled(
  VOID
);

EFI_STATUS
EFIAPI
(DimmEntry[1] == 0) {(
  VOID
);

EFI_STATUS
EFIAPI
is disabled - log via IPMI SEL(
  VOID
);

EFI_STATUS
EFIAPI
((
  VOID
);

EFI_STATUS
EFIAPI
SEL record for the disabled DIMM(
  VOID
);

EFI_STATUS
EFIAPI
System Event Record(
  VOID
);

EFI_STATUS
EFIAPI
channel position:(
  VOID
);

EFI_STATUS
EFIAPI
nibble = Channel, bottom nibble = DimmIndex(
  VOID
);

EFI_STATUS
EFIAPI
remaining event data(
  VOID
);

EFI_STATUS
EFIAPI
IPMI Add SEL Entry(
  VOID
);

EFI_STATUS
EFIAPI
(gIpmiTransport != NULL ||(
  VOID
);

EFI_STATUS
EFIAPI
Add SEL command via transport protocol(
  VOID
);

EFI_STATUS
EFIAPI
= ((IPMI_TRANSPORT_PROTOCOL *)gIpmiTransport)->AddSel ((
  VOID
);

EFI_STATUS
EFIAPI
entry type(
  VOID
);

EFI_STATUS
EFIAPI
IPMI_NETFN_STORAGE(
  VOID
);

EFI_STATUS
EFIAPI
Entry Point - Module Initialization(
  VOID
);

EFI_STATUS
EFIAPI
1: Cache UEFI Boot Services pointers(
  VOID
);

EFI_STATUS
EFIAPI
= ImageHandle;(
  VOID
);

EFI_STATUS
EFIAPI
2: Initialize DXE Services Table (for GCD access)(
  VOID
);

EFI_STATUS
EFIAPI
= InternalGetDxeServicesTable (&gEfiDxeServicesTableGuid, &gDxeServicesTable);(
  VOID
);

EFI_STATUS
EFIAPI
3: Locate and cache MM PCI Base Protocol(
  VOID
);

EFI_STATUS
EFIAPI
(gMmPciUsra == NULL) {(
  VOID
);

EFI_STATUS
EFIAPI
4: Initialize HOB list for memory topology(
  VOID
);

EFI_STATUS
EFIAPI
();(
  VOID
);

EFI_STATUS
EFIAPI
5: Get PCD protocol and configure PCIe segment bus table size(
  VOID
);

EFI_STATUS
EFIAPI
= GetPcdProtocol ();(
  VOID
);

EFI_STATUS
EFIAPI
protocol vtable interface:(
  VOID
);

EFI_STATUS
EFIAPI
6: Initialize PCIe segment bus table (CopyMem)(
  VOID
);

EFI_STATUS
EFIAPI
(&DstBuffer, (void *)PcieSegBusTableSize, PcieSegBusTableSize);(
  VOID
);

EFI_STATUS
EFIAPI
7: Check memory topology and log disabled DIMMs(
  VOID
);

EFI_STATUS
EFIAPI
Entry Point (AutoGen)(
  VOID
);

EFI_STATUS
EFIAPI
platform (boot services, DXE table, PCIe, PCD, etc.)(
  VOID
);

EFI_STATUS
EFIAPI
(ImageHandle, SystemTable);(
  VOID
);

EFI_STATUS
EFIAPI
disabled DIMMs to IPMI SEL(
  VOID
);

EFI_STATUS
EFIAPI
completion checkpoint to CMOS(
  VOID
);

EFI_STATUS
EFIAPI
= 0x71  (CMOS index register for extended RAM)(
  VOID
);

EFI_STATUS
EFIAPI
= 0xBB  (CMOS data register - platform init complete)(
  VOID
);

EFI_STATUS
EFIAPI
(0x72, 0x71);(
  VOID
);

#endif /* __OEMPLATFORMDXEPHASE_H__ */