| Address | Name | Description |
|---|---|---|
| ReadUnaligned64 | ||
| IsHobGuidMatching | ||
| PciExpressRead | ||
| IioScanNvmePort | ||
| ClearNvmePowerFaultStatus | ||
| OemReadyToBootDxeEntry | ||
| ModuleEntryPoint | ||
| Global | protocol pointers | |
| EFI_BOOT_SERVICES | *gBS = NULL; | |
| GUID | definitions (referenced in .rdata) | |
| extern | EFI_GUID gEfiIioUdsProtocolGuid; | |
| Calculate | the PCIe address: offset 0xAA in the NVMe port's | |
| PCI | configuration space. | |
| NvmePortValue | = (volatile UINT32 )PciExpressRead ( | |
| Clear | the power fault status (bit 1 = write-1-to-clear) | |
| Locate | IIO UDS protocol | |
| Status | = gBS->LocateProtocol ( | |
| Locate | CPU CSR access protocol | |
| Read | CPUBUSNO for Socket 0 (SocketId=0, StackId=0, Register=0x13023A0C) | |
| CpuBusNo | = ((UINT32 (*)(UINT8, UINT8, UINT32))(CpuCsrAccess)) (0, 0, 318914764); | |
| Check | if Socket 1 is present (bit 1 in byte 2067 of IIO UDS) | |
| if | ((((UINT8 )((UINT64 )IioUds + 2067)) & 0x2) != 0) { | |
| Register | the NVMe power fault clearing routine with the | |
| ReadyToBoot | event group. | |
| Status | = gBS->CreateEventEx ( | |
| Initialize | UEFI global variables (UefiBootServicesTableLib) | |
| gImageHandle | = ImageHandle; | |
| Cache | the HOB list | |
| GetHobList | (); | |
| Get | the PCD protocol to read PciExpressBaseAddress | |
| PcdProtocol | = GetPcdProtocol (); | |
| Register | the ReadyToBoot callback | |
| Status | = OemReadyToBootDxeEntry (); |
Generated by HR650X BIOS Decompilation Project