/** @file
  OpromUpdateDxeLightningRidgeEXRP.h -- Header for OpromUpdateDxeLightningRidgeEXRP

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __OPROMUPDATEDXELIGHTNINGRIDGEEXRP_H__
#define __OPROMUPDATEDXELIGHTNINGRIDGEEXRP_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
ReadUnaligned64(
  VOID
);

EFI_STATUS
EFIAPI
HobCompareGuid(
  VOID
);

EFI_STATUS
EFIAPI
UbaDebugPrint(
  VOID
);

EFI_STATUS
EFIAPI
UbaAssertPrint(
  VOID
);

EFI_STATUS
EFIAPI
GetUbaConfigBoardInfo(
  VOID
);

EFI_STATUS
EFIAPI
GetUbaConfigSlotCount(
  VOID
);

EFI_STATUS
EFIAPI
GetUbaConfigSlotData(
  VOID
);

EFI_STATUS
EFIAPI
SetPcieSlotNumber(
  VOID
);

EFI_STATUS
EFIAPI
SetPcieSlotNumberInit(
  VOID
);

EFI_STATUS
EFIAPI
OpromUpdateDxeLightningRidgeEXRP(
  VOID
);

EFI_STATUS
EFIAPI
Protocol GUID: E03E0D46-5263-4845-B0A4-58D57B3177E2(
  VOID
);

EFI_STATUS
EFIAPI
EFI_GUID gUbaProtocolGuid;(
  VOID
);

EFI_STATUS
EFIAPI
Root Bridge IO Protocol GUID: 2F707EBB-4A1A-11D4-9A38-0090273FC14D(
  VOID
);

EFI_STATUS
EFIAPI
EFI_GUID gEfiPciRootBridgeIoProtocolGuid;(
  VOID
);

EFI_STATUS
EFIAPI
List GUID: 7739F24C-93D7-11D4-9A3A-0090273FC14D(
  VOID
);

EFI_STATUS
EFIAPI
EFI_GUID gEfiHobListGuid;(
  VOID
);

EFI_STATUS
EFIAPI
Config Board Protocol GUID: 36232936-0E76-31C8-A13A-3AF2FC1C3932(
  VOID
);

EFI_STATUS
EFIAPI
for board-specific configuration retrieval(
  VOID
);

EFI_STATUS
EFIAPI
EFI_GUID gUbaConfigBoardProtocolGuid;(
  VOID
);

EFI_STATUS
EFIAPI
Ridge EXRP SKU GUID: 371BD79C-DE79-4C5F-AA2B-BC9EBEFA988F(
  VOID
);

EFI_STATUS
EFIAPI
EFI_GUID gLightningRidgeExrpSkuGuid;(
  VOID
);

EFI_STATUS
EFIAPI
//(
  VOID
);

EFI_STATUS
EFIAPI
board type from CMOS index 0x4B(
  VOID
);

EFI_STATUS
EFIAPI
= IoRead8 (0x70);(
  VOID
);

EFI_STATUS
EFIAPI
= (MmioRead8 (0xFDAF0490) & 2) | 1;(
  VOID
);

EFI_STATUS
EFIAPI
points into the slot table at 0xED1.(
  VOID
);

EFI_STATUS
EFIAPI
entry is 4 bytes: {SlotNum, Flags, Bus, DevFn}(
  VOID
);

EFI_STATUS
EFIAPI
-1 offset reads the previous entry's slot number byte.(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT8 *)&mUbaSlotNumberCfg;(
  VOID
);

EFI_STATUS
EFIAPI
from previous entry(
  VOID
);

EFI_STATUS
EFIAPI
number(
  VOID
);

EFI_STATUS
EFIAPI
PCI config address:(
  VOID
);

EFI_STATUS
EFIAPI
= ((Bus | ((Device | (Fn << 8)) << 8)) << 8)(
  VOID
);

EFI_STATUS
EFIAPI
read PCI config registers at offset 0x19 and 0x1A(
  VOID
);

EFI_STATUS
EFIAPI
get slot base/limit for this bus/dev/fn.(
  VOID
);

EFI_STATUS
EFIAPI
= (UINT64)((Bus | ((Device | (Fn << 8)) << 8)) << 8);(
  VOID
);

EFI_STATUS
EFIAPI
4 bytes per entry (was 3 in original, corrected)(
  VOID
);

#endif /* __OPROMUPDATEDXELIGHTNINGRIDGEEXRP_H__ */