// SetupBootOptionMaint - decompiled from Platform.efi
unsigned __int64 SetupBootOptionMaint()
{
  __int64 v0; // rax
  __int64 n0x14; // rdx
  __int64 (__fastcall **v2)(_QWORD, __int64 *, __int64, __int64 *, _BYTE, char); // rcx
  unsigned __int64 n12; // rcx
  CHAR16 *ZeroPool; // rdi
  int v6; // eax
  unsigned __int8 n12_1; // si
  unsigned __int8 n12_2; // bl
  int v9; // ebp
  __int64 v10; // rcx
  unsigned __int16 *CpuPciCfg; // r14
  __int16 VariableSize; // bp
  char *Gen1; // rcx
  int v14; // ebp
  char *_4_ports_x1; // rcx
  unsigned __int64 v16; // [rsp+30h] [rbp+8h] BYREF
  __int64 v17; // [rsp+38h] [rbp+10h] BYREF

  v0 = (*(__int64 (__fastcall **)(void *, _QWORD, void *))(BootServices + 320))(&unk_FA30, 0, &unk_12A20); /*0x3bfb*/
  if ( v0 < 0 ) /*0x3c04*/
  {
    DebugPrint(0x80000000, "\nASSERT_EFI_ERROR (Status = %r)\n", v0); /*0x3c15*/
    Assert( /*0x3c2d*/
      (__int64)"e:\\hs\\PurleyRpPkg\\Platform\\Dxe\\Setup\\SetupInfoRecords.c",
      648,
      (__int64)"!EFI_ERROR (Status)");
  }
  if ( (unsigned int)GetManufacturingMode() == 1 ) /*0x3c3a*/
    MeInitSpsInfo(v2, n0x14); /*0x3c3c*/
  ZeroPool = (CHAR16 *)AllocateZeroPool(0x200u); /*0x3c6c*/
  if ( !ZeroPool ) /*0x3c72*/
  {
    Assert( /*0x3c87*/
      (__int64)"e:\\hs\\PurleyRpPkg\\Platform\\Dxe\\Setup\\SetupInfoRecords.c",
      1032,
      (__int64)"NewString != ((void *) 0)");
    DebugPrint(0x80000000, " ***ERROR*** Out of resources.\n"); /*0x3c98*/
    return 0x8000000000000009uLL; /*0x3ca7*/
  }
  v6 = UnicodeStrToUpper(n12) - 1; /*0x3cb1*/
  if ( v6 ) /*0x3cb4*/
  {
    if ( v6 == 1 ) /*0x3cb9*/
    {
      n12_1 = 12; /*0x3cc0*/
      n12_2 = 0; /*0x3cc3*/
      goto LABEL_13; /*0x3cc5*/
    }
    n12_1 = 0; /*0x3cbb*/
  }
  else
  {
    n12_1 = 20; /*0x3cc7*/
  }
  n12_2 = 0; /*0x3cca*/
  while ( n12_2 < n12_1 ) /*0x3ccf*/
  {
LABEL_13:
    SetupIfrOptionValue(n12_2, &v17, &v16); /*0x3cdc*/
    v9 = v16; /*0x3cf2*/
    CpuPciCfg = (unsigned __int16 *)ReadCpuPciCfg(v10, v17, v16); /*0x3d05*/
    if ( (unsigned __int16)GetVariableSize(CpuPciCfg) == 0xFFFF ) /*0x3d15*/
    {
      if ( !v9 ) /*0x3e07*/
      {
        n12_2 = (n12_2 & 0xF8) + 8; /*0x3e0c*/
        continue; /*0x3e0f*/
      }
    }
    else
    {
      VariableSize = GetVariableSize(CpuPciCfg + 41); /*0x3d24*/
      switch ( VariableSize & 0xF ) /*0x3d32*/
      {
        case 1: /*0x3d32*/
          Gen1 = "Gen1"; /*0x3d59*/
          break;
        case 2: /*0x3d32*/
          Gen1 = "Gen2"; /*0x3d50*/
          break;
        case 3: /*0x3d32*/
          Gen1 = "Gen3"; /*0x3d47*/
          break;
        default:
          Gen1 = "Can't identify!"; /*0x3d3e*/
          break;
      }
      StrAppendInfo(Gen1, ZeroPool); /*0x3d60*/
      SetupInfoRecordsWriter(qword_FEA8, word_C210[n12_2], (__int64)ZeroPool); /*0x3d78*/
      v14 = VariableSize & 0x3F0; /*0x3d7d*/
      switch ( v14 ) /*0x3d89*/
      {
        case 16: /*0x3d89*/
          _4_ports_x1 = "4 ports x1"; /*0x3db0*/
          break;
        case 32: /*0x3d89*/
          _4_ports_x1 = "2 ports x2"; /*0x3da7*/
          break;
        case 64: /*0x3d89*/
          _4_ports_x1 = "1 ports x4"; /*0x3d9e*/
          break;
        default:
          _4_ports_x1 = "Can't identify!"; /*0x3d95*/
          break;
      }
      StrAppendInfo(_4_ports_x1, ZeroPool); /*0x3db7*/
      SetupInfoRecordsWriter(qword_FEA8, word_C1E0[n12_2], (__int64)ZeroPool); /*0x3dcf*/
    }
    ++n12_2; /*0x3dd4*/
  }
  (*(void (__fastcall **)(CHAR16 *))(BootServices + 72))(ZeroPool); /*0x3ddf*/
  return 0; /*0x3e04*/
}