/** @file
  SerialIo.h -- Header for SerialIo

Copyright (c) HR650X BIOS Decompilation Project
**/

#ifndef __SERIALIO_H__
#define __SERIALIO_H__

#include "../uefi_headers/Uefi.h"

//
// Function Prototypes
//

EFI_STATUS
EFIAPI
SerialIoDriverBindingSupported(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDriverBindingStart(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDriverBindingStop(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoComponentNameGetDriverName(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoComponentNameGetControllerName(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoReset(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoSetAttributes(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoSetControlBits(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoGetControlBits(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoWrite(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoRead(
  VOID
);

EFI_STATUS
EFIAPI
UartReadRegister(
  VOID
);

EFI_STATUS
EFIAPI
UartWriteRegister(
  VOID
);

EFI_STATUS
EFIAPI
UartSetFifoMode(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoCreateDevicePathNode(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoTransmitReadyTimer(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDetectUart(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDetectUartEnhanced(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDriverEntryPoint(
  VOID
);

EFI_STATUS
EFIAPI
HobGetAcpiDevicePathEnd(
  VOID
);

EFI_STATUS
EFIAPI
port name strings (off_3560 at 0x3560)(
  VOID
);

EFI_STATUS
EFIAPI
const CHAR16 *mComPortNames[10] = {(
  VOID
);

EFI_STATUS
EFIAPI
rate table (dword_35D0 at 0x35D0)(
  VOID
);

EFI_STATUS
EFIAPI
rates in ascending order, used to clamp requested baud rates(
  VOID
);

EFI_STATUS
EFIAPI
the nearest valid value.(
  VOID
);

EFI_STATUS
EFIAPI
const UINT32 mBaudRateTable[19] = {(
  VOID
);

EFI_STATUS
EFIAPI
UART Device Table (at 0x3AC8)(
  VOID
);

EFI_STATUS
EFIAPI
by DeviceId = 0xFFFF.(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDriverBindingStart code iterates this table to match PCI UART(
  VOID
);

EFI_STATUS
EFIAPI
at 0x3AC8: first entry = {0xFFFF, 0x00FF, ...} (table may be empty/terminator)(
  VOID
);

EFI_STATUS
EFIAPI
serial attributes for initial Setup(
  VOID
);

EFI_STATUS
EFIAPI
at 0x35B0 = 0x0000130E03(
  VOID
);

EFI_STATUS
EFIAPI
magic constant:(
  VOID
);

EFI_STATUS
EFIAPI
consecutive write timeouts before blocking(
  VOID
);

EFI_STATUS
EFIAPI
flow control timeout (in 100ns units, 10 seconds)(
  VOID
);

EFI_STATUS
EFIAPI
timeout loop limit(
  VOID
);

EFI_STATUS
EFIAPI
gEfiSerialIoProtocolGuid     = EFI_SERIAL_IO_PROTOCOL_GUID;(
  VOID
);

EFI_STATUS
EFIAPI
path GUID for UART serial device node(
  VOID
);

EFI_STATUS
EFIAPI
gEfiSerialIoDevicePathGuid   = EFI_SERIAL_IO_DEVICE_PATH_GUID;(
  VOID
);

EFI_STATUS
EFIAPI
EFIAPI(
  VOID
);

EFI_STATUS
EFIAPI
Name 2 Protocol(
  VOID
);

EFI_STATUS
EFIAPI
I/O Protocol Functions(
  VOID
);

EFI_STATUS
EFIAPI
Hardware Access(
  VOID
);

EFI_STATUS
EFIAPI
UartReadRegister ((
  VOID
);

EFI_STATUS
EFIAPI
functions (not protocol interface, internal)(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoCreateDevicePathNode ((
  VOID
);

EFI_STATUS
EFIAPI
frees(
  VOID
);

EFI_STATUS
EFIAPI
(Private->AccessMethod) {(
  VOID
);

EFI_STATUS
EFIAPI
access (direct memory read of register)(
  VOID
);

EFI_STATUS
EFIAPI
(Private->RegisterWidth) {(
  VOID
);

EFI_STATUS
EFIAPI
I/O port access(
  VOID
);

EFI_STATUS
EFIAPI
__inbyte(Offset + (UINT16)Private->BaseAddress);(
  VOID
);

EFI_STATUS
EFIAPI
I/O protocol backed access(
  VOID
);

EFI_STATUS
EFIAPI
*PciIo;(
  VOID
);

EFI_STATUS
EFIAPI
PCI MMIO read via PCI I/O protocol(
  VOID
);

EFI_STATUS
EFIAPI
PCI I/O port read(
  VOID
);

EFI_STATUS
EFIAPI
access(
  VOID
);

EFI_STATUS
EFIAPI
run detection for '$SIO' magic UARTs(
  VOID
);

EFI_STATUS
EFIAPI
(Private->Magic != SERIAL_IO_MAGIC) {(
  VOID
);

EFI_STATUS
EFIAPI
FIFO, clear RCVR/XMIT FIFOs(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_FCR, FCR_FIFO_ENABLE |(
  VOID
);

EFI_STATUS
EFIAPI
IIR to check FIFO enable status(
  VOID
);

EFI_STATUS
EFIAPI
(UartReadRegister (Private, R_UART_IIR) == 0xFF) {(
  VOID
);

EFI_STATUS
EFIAPI
UART at this address (bus pulls data high)(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_FCR, SavedFcr);(
  VOID
);

EFI_STATUS
EFIAPI
any pending data(
  VOID
);

EFI_STATUS
EFIAPI
8250/16550 detection by writing 0x80 then checking loopback(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_THR, 0x80);(
  VOID
);

EFI_STATUS
EFIAPI
if 0x80 can be read back correctly(
  VOID
);

EFI_STATUS
EFIAPI
((UartReadRegister (Private, R_UART_LSR) & LSR_DR) != 0 &&(
  VOID
);

EFI_STATUS
EFIAPI
FIFO: standard 8250/16450(
  VOID
);

EFI_STATUS
EFIAPI
FCR to enabled+cleared state for further probing(
  VOID
);

EFI_STATUS
EFIAPI
is controlled by byte_3FA1 (a global flag, possibly setup-dependent)(
  VOID
);

EFI_STATUS
EFIAPI
(mSomeLoopbackEnableFlag) {(
  VOID
);

EFI_STATUS
EFIAPI
remaining data(
  VOID
);

EFI_STATUS
EFIAPI
((UartReadRegister (Private, R_UART_LSR) & LSR_DR) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
DTR/RTS loopback test:(
  VOID
);

EFI_STATUS
EFIAPI
DTR bit(
  VOID
);

EFI_STATUS
EFIAPI
((NextMcr & MCR_DTR) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
MCR(
  VOID
);

EFI_STATUS
EFIAPI
UartWriteRegister (Private, R_UART_FCR, 0xFE);(
  VOID
);

EFI_STATUS
EFIAPI
with 64-byte FIFO: enable FIFO with trigger level 14(
  VOID
);

EFI_STATUS
EFIAPI
/ standard: 16-byte FIFO with trigger level 1(
  VOID
);

EFI_STATUS
EFIAPI
UART: clear DLAB, disable break, set LCR to default(
  VOID
);

EFI_STATUS
EFIAPI
= UartReadRegister (Private, R_UART_LCR);(
  VOID
);

EFI_STATUS
EFIAPI
FIFOs(
  VOID
);

EFI_STATUS
EFIAPI
FIFO with default depth (64 if 16750, else 16)(
  VOID
);

EFI_STATUS
EFIAPI
(Private, 0x40, 0);(
  VOID
);

EFI_STATUS
EFIAPI
MCR loopback bits(
  VOID
);

EFI_STATUS
EFIAPI
= UartReadRegister (Private, R_UART_MCR);(
  VOID
);

EFI_STATUS
EFIAPI
scratch register(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_SCR, 0);(
  VOID
);

EFI_STATUS
EFIAPI
serial attributes(
  VOID
);

EFI_STATUS
EFIAPI
= Private->UartConfig;(
  VOID
);

EFI_STATUS
EFIAPI
SW FIFO and state(
  VOID
);

EFI_STATUS
EFIAPI
RBR (read to clear)(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_RBR);(
  VOID
);

EFI_STATUS
EFIAPI
defaults for zero-valued parameters(
  VOID
);

EFI_STATUS
EFIAPI
(BaudRate == 0) {(
  VOID
);

EFI_STATUS
EFIAPI
}(
  VOID
);

EFI_STATUS
EFIAPI
= 1(
  VOID
);

EFI_STATUS
EFIAPI
(Private->HardwareType == HW_TYPE_16750 && DataBits < 7) {(
  VOID
);

EFI_STATUS
EFIAPI
baud rate to nearest valid table entry(
  VOID
);

EFI_STATUS
EFIAPI
(BaudIndex = 0; BaudIndex < 19 - 1; BaudIndex++) {(
  VOID
);

EFI_STATUS
EFIAPI
all parameters against range limits(
  VOID
);

EFI_STATUS
EFIAPI
(ReceiveFifoDepth - 1 > 63 ||(
  VOID
);

EFI_STATUS
EFIAPI
if already configured at these settings(
  VOID
);

EFI_STATUS
EFIAPI
(Private->BaudRate         == BaudRate &&(
  VOID
);

EFI_STATUS
EFIAPI
FIFO depth in hardware if changed(
  VOID
);

EFI_STATUS
EFIAPI
(Private->UartConfig->ReceiveFifoDepth != ReceiveFifoDepth) {(
  VOID
);

EFI_STATUS
EFIAPI
baud rate divisor(
  VOID
);

EFI_STATUS
EFIAPI
= Clock / (16 * BaudRate);(
  VOID
);

EFI_STATUS
EFIAPI
DLAB (Divisor Latch Access Bit) and wait for THRE+TSRE(
  VOID
);

EFI_STATUS
EFIAPI
= UartReadRegister (Private, R_UART_LCR) | LCR_DLAB;(
  VOID
);

EFI_STATUS
EFIAPI
divisor(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_LCR, Lcr);(
  VOID
);

EFI_STATUS
EFIAPI
line control (parity, stop bits, data bits)(
  VOID
);

EFI_STATUS
EFIAPI
(Parity) {(
  VOID
);

EFI_STATUS
EFIAPI
NewLcr &= ~(LCR_PEN | LCR_EPS | LCR_SP);(
  VOID
);

EFI_STATUS
EFIAPI
NewLcr = (NewLcr & ~(LCR_PEN | LCR_EPS | LCR_SP)) | (LCR_PEN | LCR_EPS);(
  VOID
);

EFI_STATUS
EFIAPI
NewLcr = (NewLcr & ~(LCR_EPS | LCR_SP)) | LCR_PEN;(
  VOID
);

EFI_STATUS
EFIAPI
/ SpaceParity(
  VOID
);

EFI_STATUS
EFIAPI
(Mark=4, Space=5 in EFI)(
  VOID
);

EFI_STATUS
EFIAPI
word length (5, 6, 7, 8 -> 0, 1, 2, 3)(
  VOID
);

EFI_STATUS
EFIAPI
= (NewLcr & ~(LCR_WLS0 | LCR_WLS1)) | (DataBits - 5);(
  VOID
);

EFI_STATUS
EFIAPI
stored configuration(
  VOID
);

EFI_STATUS
EFIAPI
parent via re-propagated device path if attributes changed(
  VOID
);

EFI_STATUS
EFIAPI
(Private->BaudRate   != BaudRate ||(
  VOID
);

EFI_STATUS
EFIAPI
device path with new attributes and re-install(
  VOID
);

EFI_STATUS
EFIAPI
*OldDevPath;(
  VOID
);

EFI_STATUS
EFIAPI
old if present(
  VOID
);

EFI_STATUS
EFIAPI
(Private->ParentDevicePath != NULL) {(
  VOID
);

EFI_STATUS
EFIAPI
((Control & 0xFFFF8FFC) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
DTR (MCR bit 0)(
  VOID
);

EFI_STATUS
EFIAPI
= (Mcr & ~MCR_DTR) | ((Control & SERIAL_CTRL_DTR) ? MCR_DTR : 0);(
  VOID
);

EFI_STATUS
EFIAPI
RTS (MCR bit 1)(
  VOID
);

EFI_STATUS
EFIAPI
= (Mcr & ~MCR_RTS) | ((Control & SERIAL_CTRL_RTS) ? MCR_RTS : 0);(
  VOID
);

EFI_STATUS
EFIAPI
Loopback (MCR bit 4) -> mapped to SERIAL_CTRL_REQUEST_TO_SEND bit 12 (0x1000)(
  VOID
);

EFI_STATUS
EFIAPI
= (Mcr & ~MCR_LOOP) | ((Control & 0x1000) ? MCR_LOOP : 0);(
  VOID
);

EFI_STATUS
EFIAPI
software control bits(
  VOID
);

EFI_STATUS
EFIAPI
Modem Status Register(
  VOID
);

EFI_STATUS
EFIAPI
= UartReadRegister (Private, R_UART_MSR);(
  VOID
);

EFI_STATUS
EFIAPI
Modem Control Register(
  VOID
);

EFI_STATUS
EFIAPI
software-controlled hardware reset bit(
  VOID
);

EFI_STATUS
EFIAPI
((Private->ControlBits & SERIAL_CTRL_HARDWARE_RESET) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
Line Status Register for error conditions(
  VOID
);

EFI_STATUS
EFIAPI
= UartReadRegister (Private, R_UART_LSR);(
  VOID
);

EFI_STATUS
EFIAPI
exactly - indicates TX in progress(
  VOID
);

/// arm timer and return error
EFI_STATUS
EFIAPI
many retries or CTS lost(
  VOID
);

EFI_STATUS
EFIAPI
RTS/CTS is active, limit writes to 16 bytes per call(
  VOID
);

EFI_STATUS
EFIAPI
flow control: use SW FIFO or direct write(
  VOID
);

EFI_STATUS
EFIAPI
(*BufferSize > 0) {(
  VOID
);

EFI_STATUS
EFIAPI
SW FIFO if space available(
  VOID
);

EFI_STATUS
EFIAPI
(Private->FifoCount < *FifoDepth) {(
  VOID
);

EFI_STATUS
EFIAPI
flow control: poll for CTS before sending(
  VOID
);

EFI_STATUS
EFIAPI
{(
  VOID
);

EFI_STATUS
EFIAPI
character received(
  VOID
);

EFI_STATUS
EFIAPI
write (no flow control or RTS)(
  VOID
);

EFI_STATUS
EFIAPI
((Private->ControlBits & SERIAL_CTRL_HARDWARE_RESET) != 0 &&(
  VOID
);

EFI_STATUS
EFIAPI
RTS(
  VOID
);

EFI_STATUS
EFIAPI
= TRUE;(
  VOID
);

EFI_STATUS
EFIAPI
for CTS (MSR bit 4)(
  VOID
);

EFI_STATUS
EFIAPI
((UartReadRegister (Private, R_UART_MSR) & MSR_CTS) == 0) {(
  VOID
);

EFI_STATUS
EFIAPI
loop(
  VOID
);

EFI_STATUS
EFIAPI
for THR empty (LSR bit 5)(
  VOID
);

EFI_STATUS
EFIAPI
byte(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_THR(
  VOID
);

EFI_STATUS
EFIAPI
status from partial transfer(
  VOID
);

EFI_STATUS
EFIAPI
(AutoRts && Status == EFI_TIMEOUT) {(
  VOID
);

EFI_STATUS
EFIAPI
EFI_TIMEOUT but with data written(
  VOID
);

EFI_STATUS
EFIAPI
FIFO mode: read from SW FIFO buffer(
  VOID
);

EFI_STATUS
EFIAPI
the FIFO after an overrun(
  VOID
);

EFI_STATUS
EFIAPI
read from UART: poll for data(
  VOID
);

EFI_STATUS
EFIAPI
FIFO on overrun(
  VOID
);

EFI_STATUS
EFIAPI
( ; Index < *BufferSize; Index++) {(
  VOID
);

EFI_STATUS
EFIAPI
more data available now(
  VOID
);

EFI_STATUS
EFIAPI
for CTS recovery(
  VOID
);

EFI_STATUS
EFIAPI
((UartReadRegister (Private, R_UART_MSR) & MSR_CTS) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
for THRE recovery(
  VOID
);

EFI_STATUS
EFIAPI
((UartReadRegister (Private, R_UART_LSR) & LSR_THRE) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
flag controlling extended UART detection (at 0x3FA1)(
  VOID
);

EFI_STATUS
EFIAPI
UINT8  mExtendedUartDetection;(
  VOID
);

EFI_STATUS
EFIAPI
UART presence and loopback detection.(
  VOID
);

EFI_STATUS
EFIAPI
TRUE if UART appears absent/removed, FALSE if it seems present.(
  VOID
);

EFI_STATUS
EFIAPI
SerialIoDetectUartEnhanced ((
  VOID
);

EFI_STATUS
EFIAPI
FIFOs, clear them(
  VOID
);

EFI_STATUS
EFIAPI
UART: return TRUE = removed(
  VOID
);

EFI_STATUS
EFIAPI
RBR(
  VOID
);

EFI_STATUS
EFIAPI
detection: write 0x80, then 0x08, 0x20, 0x08(
  VOID
);

EFI_STATUS
EFIAPI
without FIFO(
  VOID
);

EFI_STATUS
EFIAPI
DeviceRemoved;(
  VOID
);

EFI_STATUS
EFIAPI
test: toggle DTR and check MSR CTS change(
  VOID
);

EFI_STATUS
EFIAPI
(mExtendedUartDetection) {(
  VOID
);

EFI_STATUS
EFIAPI
DTR in MCR(
  VOID
);

EFI_STATUS
EFIAPI
((Msr2 & MCR_DTR) != 0) {(
  VOID
);

EFI_STATUS
EFIAPI
//(
  VOID
);

EFI_STATUS
EFIAPI
Driver Binding Protocol instance (installed on image handle)(
  VOID
);

EFI_STATUS
EFIAPI
gSerialIoDriverBinding = {(
  VOID
);

EFI_STATUS
EFIAPI
Component Name 2 Protocol instance(
  VOID
);

EFI_STATUS
EFIAPI
gSerialIoComponentName2 = {(
  VOID
);

EFI_STATUS
EFIAPI
languages for component name(
  VOID
);

EFI_STATUS
EFIAPI
CHAR8  *mSupportedLanguages[] = {(
  VOID
);

EFI_STATUS
EFIAPI
more languages as needed(
  VOID
);

EFI_STATUS
EFIAPI
Driver Binding Protocol and Component Name 2 Protocol(
  VOID
);

EFI_STATUS
EFIAPI
= EfiLibInstallDriverBindingComponentName2 ((
  VOID
);

EFI_STATUS
EFIAPI
1: Controller has ISA I/O protocol (legacy ISA/ACPI UART)(
  VOID
);

EFI_STATUS
EFIAPI
= gBS->OpenProtocol ((
  VOID
);

EFI_STATUS
EFIAPI
ACPI device path for UART(
  VOID
);

EFI_STATUS
EFIAPI
2: UART IO protocol or ACPI device path(
  VOID
);

EFI_STATUS
EFIAPI
(HobGetAcpiDevicePathEnd (This, ControllerHandle, &AcpiEnd, 16) >= 0 &&(
  VOID
);

EFI_STATUS
EFIAPI
device path end found: this is an ACPI UART(
  VOID
);

EFI_STATUS
EFIAPI
that it has type=3, subtype=14 (Serial I/O device path)(
  VOID
);

EFI_STATUS
EFIAPI
(RemainingDevicePath != NULL &&(
  VOID
);

EFI_STATUS
EFIAPI
3: PCI UART - check for PCI I/O protocol(
  VOID
);

EFI_STATUS
EFIAPI
(mSomeLoopbackEnableFlag == 1) {(
  VOID
);

EFI_STATUS
EFIAPI
protocol since we only need it for Supported()(
  VOID
);

EFI_STATUS
EFIAPI
4: UART IO protocol on child UART device(
  VOID
);

EFI_STATUS
EFIAPI
for UART mode(
  VOID
);

EFI_STATUS
EFIAPI
for 512 or 256 byte FIFO via UART IO protocol(
  VOID
);

EFI_STATUS
EFIAPI
is used for MMIO UART controllers(
  VOID
);

EFI_STATUS
EFIAPI
512-byte UART(
  VOID
);

EFI_STATUS
EFIAPI
Found512;(
  VOID
);

EFI_STATUS
EFIAPI
device path looking for ACPI UART node(
  VOID
);

EFI_STATUS
EFIAPI
= DevicePath;(
  VOID
);

EFI_STATUS
EFIAPI
END(
  VOID
);

EFI_STATUS
EFIAPI
device path: check HID/UID(
  VOID
);

EFI_STATUS
EFIAPI
EFI_SUCCESS;(
  VOID
);

EFI_STATUS
EFIAPI
supported controller found(
  VOID
);

EFI_STATUS
EFIAPI
(Status == EFI_ALREADY_STARTED) {(
  VOID
);

EFI_STATUS
EFIAPI
for serial I/O device path (0x00180A03-...)(
  VOID
);

EFI_STATUS
EFIAPI
SerialDevicePathGuid = EFI_SERIAL_IO_DEVICE_PATH_GUID;(
  VOID
);

EFI_STATUS
EFIAPI
for ACPI UART HID(
  VOID
);

EFI_STATUS
EFIAPI
AcpiUartHid = { 0x01031804, 0x9A9D, 0x3749(
  VOID
);

EFI_STATUS
EFIAPI
for ISA I/O protocol first (legacy COM ports)(
  VOID
);

EFI_STATUS
EFIAPI
UART: get resources (I/O base, IRQ)(
  VOID
);

EFI_STATUS
EFIAPI
for device path + ACPI table (legacy UART enumeration)(
  VOID
);

EFI_STATUS
EFIAPI
the UART IO protocol(
  VOID
);

EFI_STATUS
EFIAPI
UART capabilities(
  VOID
);

EFI_STATUS
EFIAPI
UART with ISA I/O(
  VOID
);

EFI_STATUS
EFIAPI
enumerated UART(
  VOID
);

EFI_STATUS
EFIAPI
PCI UARTs(
  VOID
);

EFI_STATUS
EFIAPI
(UartIo->GetChildHandle != NULL) {(
  VOID
);

EFI_STATUS
EFIAPI
found with FIFO type 0 (512 byte)(
  VOID
);

EFI_STATUS
EFIAPI
Private->InsideIo  = FALSE;(
  VOID
);

EFI_STATUS
EFIAPI
parent channel(
  VOID
);

EFI_STATUS
EFIAPI
or 512 byte FIFO(
  VOID
);

EFI_STATUS
EFIAPI
device path to compute device path for child(
  VOID
);

EFI_STATUS
EFIAPI
for ACPI device path (UART IO protocol from HOB)(
  VOID
);

EFI_STATUS
EFIAPI
(HobGetAcpiDevicePathEnd ((
  VOID
);

EFI_STATUS
EFIAPI
may be an ACPI enumerated UART(
  VOID
);

EFI_STATUS
EFIAPI
protocols(
  VOID
);

EFI_STATUS
EFIAPI
UART IO mode: try PCI I/O protocol(
  VOID
);

EFI_STATUS
EFIAPI
DeviceId high(
  VOID
);

EFI_STATUS
EFIAPI
up clock frequency and register width in PCI UART table(
  VOID
);

EFI_STATUS
EFIAPI
(gPciUartTableStart != (UINT16)-1) {(
  VOID
);

EFI_STATUS
EFIAPI
IO protocol available(
  VOID
);

EFI_STATUS
EFIAPI
no protocols found, fail(
  VOID
);

EFI_STATUS
EFIAPI
(Private->PciIo == NULL && Private->BaseAddress == 0) {(
  VOID
);

EFI_STATUS
EFIAPI
UART hardware(
  VOID
);

EFI_STATUS
EFIAPI
(Private, R_UART_SCR, 0xAA);(
  VOID
);

EFI_STATUS
EFIAPI
not present or not responding(
  VOID
);

EFI_STATUS
EFIAPI
CleanupAll;(
  VOID
);

EFI_STATUS
EFIAPI
for FIFO type(
  VOID
);

EFI_STATUS
EFIAPI
(64-byte FIFO)(
  VOID
);

EFI_STATUS
EFIAPI
(16-byte FIFO, rev A)(
  VOID
);

EFI_STATUS
EFIAPI
(16-byte FIFO, rev B)(
  VOID
);

EFI_STATUS
EFIAPI
defaults for clock and register width if not yet configured(
  VOID
);

EFI_STATUS
EFIAPI
(Private->ClockFrequency == 0) {(
  VOID
);

EFI_STATUS
EFIAPI
PC UART clock(
  VOID
);

EFI_STATUS
EFIAPI
state(
  VOID
);

EFI_STATUS
EFIAPI
up Serial I/O Protocol function table(
  VOID
);

EFI_STATUS
EFIAPI
points to self(
  VOID
);

EFI_STATUS
EFIAPI
default serial attributes(
  VOID
);

EFI_STATUS
EFIAPI
default attributes on hardware(
  VOID
);

EFI_STATUS
EFIAPI
= Private->SetAttributes (Private, 0, 0, 0, 0, 0, 0);(
  VOID
);

EFI_STATUS
EFIAPI
device path attributes if present(
  VOID
);

EFI_STATUS
EFIAPI
(RemainingDevicePath != NULL) {(
  VOID
);

EFI_STATUS
EFIAPI
device path for child(
  VOID
);

EFI_STATUS
EFIAPI
= HobDuplicateDevicePath ((
  VOID
);

EFI_STATUS
EFIAPI
Serial I/O Protocol on new child handle(
  VOID
);

EFI_STATUS
EFIAPI
= gBS->InstallMultipleProtocolInterfaces ((
  VOID
);

EFI_STATUS
EFIAPI
protocols (child handle)(
  VOID
);

EFI_STATUS
EFIAPI
(Private->IsaAccess) {(
  VOID
);

EFI_STATUS
EFIAPI
timer for transmit ready monitoring(
  VOID
);

EFI_STATUS
EFIAPI
= gBS->CreateEvent ((
  VOID
);

EFI_STATUS
EFIAPI
protocols opened by Supported()(
  VOID
);

EFI_STATUS
EFIAPI
= gBS->CloseProtocol ((
  VOID
);

EFI_STATUS
EFIAPI
the child: get private context from child handle(
  VOID
);

EFI_STATUS
EFIAPI
which protocol was opened on the controller(
  VOID
);

EFI_STATUS
EFIAPI
the child protocol(
  VOID
);

EFI_STATUS
EFIAPI
protocols from child handle(
  VOID
);

EFI_STATUS
EFIAPI
the private context(
  VOID
);

EFI_STATUS
EFIAPI
the private context from the child handle(
  VOID
);

EFI_STATUS
EFIAPI
= NULL;(
  VOID
);

EFI_STATUS
EFIAPI
to the end of the device path(
  VOID
);

EFI_STATUS
EFIAPI
(PathWalk->Type != 0x7F) {  // END(
  VOID
);

EFI_STATUS
EFIAPI
an ACPI device path(
  VOID
);

EFI_STATUS
EFIAPI
= EFI_UNSUPPORTED;(
  VOID
);

#endif /* __SERIALIO_H__ */