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AMI-Aptio-BIOS-Reversed / SiInitPreMem / decompiled / ffd82d2f.c
@Ajax Dong Ajax Dong 2 days ago 4 KB Init
// 0xffd82d2f
{"addr":"0xffd82d2f","code":"int __fastcall sub_FFD82D2F(int a1, int a2)\n{\n  unsigned __int8 i_1; // al\n  unsigned int i_2; // esi\n  unsigned int i; // ebx\n  int v5; // eax\n  int v6; // edi\n  unsigned int j; // esi\n  int v8; // ebp\n  unsigned int n0x96; // ebp\n  unsigned int i_3; // esi\n  unsigned int k; // ebp\n  int v12; // esi\n  unsigned int n0x96_2; // ebp\n  unsigned int i_4; // esi\n  unsigned int n0x96_1; // [esp+14h] [ebp-60h] BYREF\n  unsigned int v17; // [esp+18h] [ebp-5Ch]\n  int v18; // [esp+1Ch] [ebp-58h]\n  int v19; // [esp+20h] [ebp-54h]\n  _DWORD v20[20]; // [esp+24h] [ebp-50h]\n\n  v18 = a2; /*0xffd82d36*/\n  v19 = a1; /*0xffd82d3a*/\n  if ( (unsigned __int8)sub_FFD8D59A() )\n  {\n    sub_FFD7F9AF(64, (int)\"DWR: PchPcieRpSpeedChange() End\\n\");\n  }\n  else\n  {\n    i_1 = sub_FFD8BFFD(); /*0xffd82d5a*/\n    i_2 = 0; /*0xffd82d5f*/\n    for ( i = i_1; i_2 < i; ++i_2 ) /*0xffd82d66*/\n    {\n      v20[i_2] = 0; /*0xffd82d68*/\n      if ( sub_FFD8D75C(&n0x96_1) >= 0 ) /*0xffd82d80*/\n      {\n        v20[i_2] = sub_FFD8CBBA(0, v17, n0x96_1); /*0xffd82db2*/\n      }\n      else\n      {\n        v5 = sub_FFD7F97E(); /*0xffd82d82*/\n        if ( v5 ) /*0xffd82d89*/\n          (*(void (__cdecl **)(const char *, int, const char *))(v5 + 4))( /*0xffd82d9a*/\n            \"e:\\\\hs\\\\PurleySktPkg\\\\SouthClusterLbg\\\\LibraryPrivate\\\\PeiPchInitLib\\\\PchRootPorts.c\",\n            822,\n            \"((BOOLEAN)(0==1))\");\n      }\n    }\n    v6 = 0; /*0xffd82dbb*/\n    for ( j = 0; j < i; ++j ) /*0xffd82dc1*/\n    {\n      v8 = v20[j]; /*0xffd82dc3*/\n      if ( v8 ) /*0xffd82dc9*/\n      {\n        if ( (unsigned __int16)sub_FFD8CCA5((unsigned __int16 *)v20[j]) != 0xFFFF ) /*0xffd82dda*/\n        {\n          v17 = *(_DWORD *)(v8 + 76) & 0xF; /*0xffd82de2*/\n          if ( v17 > 1 && !sub_FFD826AE(v19 + 28, j, *(_BYTE *)(j + v18)) ) /*0xffd82dfd*/\n          {\n            sub_FFD8CC85(v17); /*0xffd82e13*/\n            if ( (sub_FFD8CCA5((unsigned __int16 *)(v8 + 90)) & 0x40) != 0 ) /*0xffd82e23*/\n            {\n              sub_FFD8CC4F(v8 + 80, 32); /*0xffd82e2b*/\n              v6 |= 1 << j; /*0xffd82e30*/\n            }\n          }\n        }\n      }\n    }\n    n0x96 = 0; /*0xffd82e38*/\n    n0x96_1 = 0; /*0xffd82e3a*/\n    if ( v6 ) /*0xffd82e40*/\n    {\n      do /*0xffd82e90*/\n      {\n        if ( n0x96 >= 0x96 ) /*0xffd82e4c*/\n          break; /*0xffd82e4c*/\n        sub_FFD7FA46(0x64u); /*0xffd82e51*/\n        i_3 = 0; /*0xffd82e56*/\n        if ( i ) /*0xffd82e5a*/\n        {\n          do /*0xffd82e83*/\n          {\n            if ( ((1 << i_3) & v6) != 0 && (sub_FFD8CCA5((unsigned __int16 *)(v20[i_3] + 82)) & 0x2000) != 0 ) /*0xffd82e7b*/\n              v6 &= ~(1 << i_3); /*0xffd82e7d*/\n            ++i_3; /*0xffd82e80*/\n          }\n          while ( i_3 < i ); /*0xffd82e83*/\n          n0x96 = n0x96_1; /*0xffd82e85*/\n        }\n        n0x96_1 = ++n0x96; /*0xffd82e8a*/\n      }\n      while ( v6 ); /*0xffd82e90*/\n      if ( v6 ) /*0xffd82e94*/\n      {\n        for ( k = 0; k < i; ++k ) /*0xffd82e9e*/\n        {\n          if ( ((1 << k) & v6) != 0 ) /*0xffd82ea9*/\n          {\n            v12 = v20[k]; /*0xffd82eab*/\n            sub_FFD8CC85(1); /*0xffd82eb9*/\n            sub_FFD8CC4F(v12 + 80, 32); /*0xffd82ec5*/\n          }\n        }\n        n0x96_2 = 0; /*0xffd82ecf*/\n        n0x96_1 = 0; /*0xffd82ed1*/\n        do /*0xffd82f1f*/\n        {\n          if ( n0x96_2 >= 0x96 ) /*0xffd82edb*/\n            break; /*0xffd82edb*/\n          sub_FFD7FA46(0x64u); /*0xffd82ee0*/\n          i_4 = 0; /*0xffd82ee5*/\n          if ( i ) /*0xffd82ee9*/\n          {\n            do /*0xffd82f12*/\n            {\n              if ( ((1 << i_4) & v6) != 0 && (sub_FFD8CCA5((unsigned __int16 *)(v20[i_4] + 82)) & 0x2000) != 0 ) /*0xffd82f0a*/\n                v6 &= ~(1 << i_4); /*0xffd82f0c*/\n              ++i_4; /*0xffd82f0f*/\n            }\n            while ( i_4 < i ); /*0xffd82f12*/\n            n0x96_2 = n0x96_1; /*0xffd82f14*/\n          }\n          n0x96_1 = ++n0x96_2; /*0xffd82f19*/\n        }\n        while ( v6 ); /*0xffd82f1f*/\n      }\n    }\n  }\n  return 0; /*0xffd82f21*/\n}","refs":[{"addr":"0xffd7f9af","name":"sub_FFD7F9AF"},{"addr":"0xffd932d4","name":"aDwrPchpcierpsp","string":"DWR: PchPcieRpSpeedChange() End\n"},{"addr":"0xffd8bffd","name":"sub_FFD8BFFD"},{"addr":"0xffd8cbba","name":"sub_FFD8CBBA"},{"addr":"0xffd7f97e","name":"sub_FFD7F97E"},{"addr":"0xffd9318c","name":"aEHsPurleysktpk_5","string":"e:\\hs\\PurleySktPkg\\SouthClusterLbg\\LibraryPrivate\\PeiPchInitLib\\PchRootPorts.c"},{"addr":"0xffd91b10","name":"aBoolean01","string":"((BOOLEAN)(0==1))"},{"addr":"0xffd8d75c","name":"sub_FFD8D75C"},{"addr":"0xffd8cc85","name":"sub_FFD8CC85"},{"addr":"0xffd8cc4f","name":"sub_FFD8CC4F"},{"addr":"0xffd8cca5","name":"sub_FFD8CCA5"},{"addr":"0xffd826ae","name":"sub_FFD826AE"},{"addr":"0xffd7fa46","name":"sub_FFD7FA46"},{"addr":"0xffd8d59a","name":"sub_FFD8D59A"}]}