// 0xffd83249
{"addr":"0xffd83249","code":"int sub_FFD83249()\n{\n  int n2; // esi\n  char *n3_1; // edi\n  int v2; // ebx\n  int v3; // eax\n  int v4; // eax\n  int v5; // eax\n  int v6; // eax\n  unsigned int i; // ebp\n  int v8; // eax\n  int v9; // ecx\n  int v10; // esi\n  int v12; // [esp+14h] [ebp-30h]\n  int v13; // [esp+1Ch] [ebp-28h]\n  int n2_2; // [esp+28h] [ebp-1Ch]\n  int v15; // [esp+2Ch] [ebp-18h]\n  unsigned int n3; // [esp+30h] [ebp-14h]\n  int n2_1; // [esp+34h] [ebp-10h]\n  int n4; // [esp+38h] [ebp-Ch]\n  int n4_1; // [esp+3Ch] [ebp-8h]\n  int n4_2; // [esp+40h] [ebp-4h]\n\n  sub_FFD7F9AF(64, (int)\"PchConfigurePsfGrantCountsForPcie() Start\\n\"); /*0xffd83257*/\n  n2 = sub_FFD8BE68(); /*0xffd83263*/\n  n2_2 = n2; /*0xffd83265*/\n  if ( n2 == 2 ) /*0xffd8326c*/\n    n3 = 3; /*0xffd8326e*/\n  else\n    n3 = 5; /*0xffd83288*/\n  n3_1 = 0; /*0xffd832a0*/\n  v2 = 0; /*0xffd832a2*/\n  v15 = 0; /*0xffd832a6*/\n  do /*0xffd8341f*/\n  {\n    v3 = sub_FFD83186(n3_1); /*0xffd832ad*/\n    if ( !v3 ) /*0xffd832b5*/\n    {\n      n2_1 = 1; /*0xffd83325*/\n      n4 = 1; /*0xffd83329*/\n      goto LABEL_16; /*0xffd83329*/\n    }\n    v4 = v3 - 1; /*0xffd832b7*/\n    if ( !v4 ) /*0xffd832ba*/\n    {\n      n2_1 = 2; /*0xffd83313*/\n      n4 = 4; /*0xffd8331b*/\nLABEL_16:\n      n4_2 = 1; /*0xffd8332d*/\n      n4_1 = 1; /*0xffd83331*/\n      goto LABEL_17; /*0xffd83331*/\n    }\n    v5 = v4 - 1; /*0xffd832bc*/\n    if ( v5 ) /*0xffd832bf*/\n    {\n      if ( v5 != 1 ) /*0xffd832c4*/\n      {\n        v6 = sub_FFD7F97E(); /*0xffd832c6*/\n        if ( v6 ) /*0xffd832cd*/\n          (*(void (__cdecl **)(const char *, int, const char *))(v6 + 4))( /*0xffd832e2*/\n            \"e:\\\\hs\\\\PurleySktPkg\\\\SouthClusterLbg\\\\LibraryPrivate\\\\PeiPchInitLib\\\\PchRootPorts.c\",\n            1230,\n            \"((BOOLEAN)(0==1))\");\n        goto LABEL_23; /*0xffd832e8*/\n      }\n      n2_1 = 4; /*0xffd832ed*/\n      n4_1 = 4; /*0xffd832f1*/\n    }\n    else\n    {\n      n2_1 = 2; /*0xffd832f7*/\n      n4_1 = 2; /*0xffd832ff*/\n    }\n    n4 = 4; /*0xffd83307*/\n    n4_2 = 4; /*0xffd8330b*/\nLABEL_17:\n    for ( i = 0; i < 4; ++i ) /*0xffd83335*/\n    {\n      if ( n2 == 2 ) /*0xffd8333a*/\n      {\n        v8 = (unsigned __int8)byte_FFD93FCC[v2]; /*0xffd83343*/\n        v12 = (unsigned __int8)byte_FFD93FCD[v2]; /*0xffd8334a*/\n        v9 = (unsigned __int8)byte_FFD93F44[4 * (_DWORD)n3_1 + i]; /*0xffd8334e*/\n      }\n      else\n      {\n        v8 = (unsigned __int8)byte_FFD93F8C[v2]; /*0xffd8335f*/\n        v12 = (unsigned __int8)byte_FFD93F8D[v2]; /*0xffd83366*/\n        v9 = (unsigned __int8)byte_FFD93F5C[4 * (_DWORD)n3_1 + i]; /*0xffd8336a*/\n      }\n      v10 = *(&n2_1 + i); /*0xffd83372*/\n      v13 = v9; /*0xffd8337f*/\n      sub_FFD7F9AF(64, (int)\"DGCR%d = %d\\n\", v8, v10); /*0xffd83387*/\n      sub_FFD8C578(-32, v10); /*0xffd8339f*/\n      sub_FFD7F9AF(64, (int)\"DGCR%d = %d\\n\", v12, v10); /*0xffd833b0*/\n      sub_FFD8C578(-32, v10); /*0xffd833c8*/\n      sub_FFD7F9AF(64, (int)\"PG1_TGT%d = %d\\n\", v13, v10); /*0xffd833d9*/\n      sub_FFD8C578(-32, v10); /*0xffd833f4*/\n      n2 = n2_2; /*0xffd833f9*/\n      v2 += 2; /*0xffd833ff*/\n    }\n    v2 = v15; /*0xffd8340c*/\nLABEL_23:\n    ++n3_1; /*0xffd83413*/\n    v2 += 8; /*0xffd83414*/\n    v15 = v2; /*0xffd83417*/\n  }\n  while ( (unsigned int)n3_1 < n3 ); /*0xffd8341f*/\n  return sub_FFD7F9AF(64, (int)\"PchConfigurePsfGrantCountsForPcie() End\\n\"); /*0xffd83433*/\n}","refs":[{"addr":"0xffd7f9af","name":"sub_FFD7F9AF"},{"addr":"0xffd9346c","name":"aPchconfigureps","string":"PchConfigurePsfGrantCountsForPcie() Start\n"},{"addr":"0xffd8be68","name":"sub_FFD8BE68"},{"addr":"0xffd83186","name":"sub_FFD83186"},{"addr":"0xffd7f97e","name":"sub_FFD7F97E"},{"addr":"0xffd9318c","name":"aEHsPurleysktpk_5","string":"e:\\hs\\PurleySktPkg\\SouthClusterLbg\\LibraryPrivate\\PeiPchInitLib\\PchRootPorts.c"},{"addr":"0xffd91b10","name":"aBoolean01","string":"((BOOLEAN)(0==1))"},{"addr":"0xffd93fcc","name":"byte_FFD93FCC"},{"addr":"0xffd93fcd","name":"byte_FFD93FCD"},{"addr":"0xffd93f44","name":"byte_FFD93F44"},{"addr":"0xffd93f8c","name":"byte_FFD93F8C"},{"addr":"0xffd93f8d","name":"byte_FFD93F8D"},{"addr":"0xffd93f5c","name":"byte_FFD93F5C"},{"addr":"0xffd93498","name":"aDgcrDD","string":"DGCR%d = %d\n"},{"addr":"0xffd8c578","name":"sub_FFD8C578"},{"addr":"0xffd934a8","name":"aPg1TgtDD","string":"PG1_TGT%d = %d\n"},{"addr":"0xffd934b8","name":"aPchconfigureps_0","string":"PchConfigurePsfGrantCountsForPcie() End\n"}]}