StaticSkuDataDxeNeonCityFPGA

Function Table

Address	Name	Description
	StaticSkuDataDxeEntryPoint
	IsHobGuidMatch
	ReadUnaligned64
	PlatformDebugPrint
	PlatformAssert
Protocol	GUID to locate the ACPI configuration interface.
STATIC	CONST EFI_GUID mPlatformProtocolGuid = STATIC_SKU_DATA_PROTOCOL_GUID;
GUID	for the HOB list in gST->ConfigurationTable.
STATIC	CONST EFI_GUID mHobListGuid = HOB_LIST_GUID;
GUID	key for the UMPT (Ubox Platform Topology) ACPI table.
STATIC	CONST EFI_GUID mUmptTableGuid = UMPT_TABLE_GUID;
GUID	key for the PIRQ (PCI IRQ Routing) ACPI table.
STATIC	CONST EFI_GUID mPirqTableGuid = PIRQ_TABLE_GUID;
GUID	key for the ACPF (ACPI Platform SKU data) ACPI table.
STATIC	CONST EFI_GUID mAcpfTableGuid = ACPF_TABLE_GUID;
EFI_HANDLE	gImageHandle = NULL;
EFI_SYSTEM_TABLE	*gSystemTable = NULL;
EFI_BOOT_SERVICES	*gBootServices = NULL;
EFI_RUNTIME_SERVICES	*gRuntimeServices = NULL;
VOID	*gPlatformProtocol = NULL;
VOID	*gHobList = NULL;
STATIC	CONST UMPT_VAR_BLOCK mUmptHeader = {
STATIC	CONST SKU_VAR_HEADER mPirqHeader = {
STATIC	CONST SKU_VAR_HEADER mAcpfHeader = {
STATIC	CONST EFI_GUID mSkuDataIdentifier = SKU_DATA_IDENTIFIER_GUID;
v4	in decompilation
Protocol	GUID: {E03E0D46-5263-4845-B0A4-58D57B3177E2}
The	protocol interface has the following layout:
Install	UMPT table: 24 bytes of UMPT_VAR_BLOCK data
Key	GUID: {0FF8A1CF-A0AB-4AC0-BFC9-34A78F68DD8A}
Data	at: 0x4090 (mUmptHeader)
Install	PIRQ table: 16 bytes of PIRQ header
Key	GUID: {4C1F48A5-C976-4D90-9F03-8E9B1C327FCF}
Data	at: 0x40B8 (mPirqHeader)
Install	ACPF table: 16 bytes of SKU data header
Key	GUID: {81129EF8-391D-4F63-AE99-58517EC077E3}
Data	at: 0x9000 (mAcpfHeader)
The	DataPointer field (0x40E0) references the 632-entry
SKU_CONFIG_ENTRY	table.
Walk	the configuration table
Matched	the HOB list GUID; cache the vendor table pointer
If	not found, trigger debug assertion
Read	first 64-bit half
Read	second 64-bit half
Return	cached value if already initialized
Pool	probe: allocate 31 bytes to check allocator health
If	pool allocation returned a suspiciously low address, bail out
Locate	the platform protocol
On	failure, clear the cached pointer
Read	RTC CMOS register 0x4B to determine platform type
Select	reg 0x4B, preserve NMI mask
Platform	type is already valid (>3), keep as-is
Determine	debug route based on platform type (minus 1 for 0-indexed check)
Standard	debug route
If	the debug route matches the requested level, dispatch to protocol
Protocol	function 1 (offset 0x08) = DebugPrint
Protocol	function at offset 0x08 = assert handler

Generated by HR650X BIOS Decompilation Project