UpdatePcdPei

Module Information

Field	Value
Index	0382
Module Name	UpdatePcdPei
File	UpdatePcdPei.efi
Arch	IA32 (32-bit)
Base Address	0xFFE04D44
Image Size	0x8A0 (2,208 bytes)
PE Type	PEI Module (PEIM)
MD5	e33aaf4d1d62e9e99c86929e5059ce09
SHA256	c3ee0c3a5f580c4fd70de75dd55bcf2381ecf8ecebafd148d8049b78d367eeb0
IDA Port	13370

Segments

Segment	Start	End	Size	Permissions
HEADER	0xFFE04D44	0xFFE04FA4	0x260	---
.text	0xFFE04FA4	0xFFE05264	0x2C0	rx
.rdata	0xFFE05264	0xFFE05564	0x300	r
.data	0xFFE05564	0xFFE055A4	0x40	rw
.reloc	0xFFE055A4	0xFFE055E4	0x40	r
GAP	0xFFE055E4	0xFFE05D44	0x760	rw

Functions (Renamed)

Address	Size	Name	Type	Description
0xFFE05059	7	ModuleEntryPoint	thunk	PEI entry point, delegates to UbaPcdUpdateEntry
0xFFE050D7	205	UbaPcdUpdateEntry	complex	Main logic: locate PPI, read table, call update
0xFFE051F3	50	GetPeiServicesTablePointer	complex	Get PEI services pointer via IDT
0xFFE0505E	49	PcdDebugProtocolLocate	wrapper	Locate gEfiPeiDebugPpiGuid PPI
0xFFE0508F	42	PcdDebugAssert	complex	Debug assertion handler via boot mode check
0xFFE050B9	30	PcdDebugPrint	wrapper	Debug print via PCD debug protocol
0xFFE051A4	79	PcdGetBootMode	complex	Read boot mode from CMOS port 0x4A
0xFFE05225	35	X86ReadIdtr	wrapper	Read IDTR register via SIDT instruction
0xFFE04FC4	63	CopyMem	leaf	Memory copy with overlap handling
0xFFE05024	31	SetMem32	leaf	Set 32-bit memory (pair fill)
0xFFE05044	21	SetMem	leaf	Set memory via memset32
0xFFE04FA4	21	SetMem8	leaf	Set memory via memset (byte fill)

Strings

Address	String
0xFFE05264	`\nASSERT_EFI_ERROR (Status = %r)\n`
0xFFE05288	`!EFI_ERROR (Status)`
0xFFE0529C	`PcdUpdateTable.Signature == ((('P')	('P' << 8))	((('C')	('D' << 8)) << 16))`
0xFFE052F0	`e:\hs\PurleyPlatPkg\Library\PeiUbaPlatLib\UbaPcdUpdateLib.c`
0xFFE0532C	`PcdUpdateTable.Version == 01`
0xFFE0534C	`PeiServices != ((void *) 0)`
0xFFE0536C	`e:\hs\MdePkg\Library\PeiServicesTablePointerLibIdt\PeiServicesTablePointer.c`
0xFFE053BC	`Idtr != ((void *) 0)`
0xFFE053D4	`e:\hs\MdePkg\Library\BaseLib\X86ReadIdtr.c`

Analysis Summary

This PEIM implements board-specific PCD (Platform Configuration Database) updates
during the PEI phase using the UBA (Universal Board Architecture) framework.

Architecture

Entry -- ModuleEntryPoint calls UbaPcdUpdateEntry()
PPI Locate -- Uses PeiServicesLocatePpi() to find the UBA PCD Update PPI
(identified by GUID at 0xFFE05574)
Get Table -- Calls the PPI's GetData() method to retrieve a PCD_UPDATE_TABLE
(located by GUID at 0xFFE05584)
Validate -- Checks table signature (must be 'PPCD' = 0x44435050) and version (must be 1)
Execute -- Calls the UpdatePcd() function pointer embedded in the table
Error Handling -- If the update fails, asserts and reports debug message

PCD_UPDATE_TABLE Structure

Offset  Size  Field
------  ----  -----
0x00    4     Signature   ('PPCD')
0x04    4     Version     (must be 1)
0x08    4     UpdatePcd   (function pointer)

Supporting Infrastructure

GetPeiServicesTablePointer: Retrieves PEI Services via IDT-based pointer.
The IDTR base address minus 4 contains the PEI service table pointer.
PcdGetBootMode: Reads CMOS register 0x4A to determine boot mode,
which controls whether debug assertions are active.
PcdDebugProtocolLocate/Print/Assert: Debug infrastructure for PEI-phase
debug messages via the gEfiPeiDebugPpiGuid protocol.

Source File References

e:\hs\PurleyPlatPkg\Library\PeiUbaPlatLib\UbaPcdUpdateLib.c
e:\hs\MdePkg\Library\PeiServicesTablePointerLibIdt\PeiServicesTablePointer.c
e:\hs\MdePkg\Library\BaseLib\X86ReadIdtr.c