/** @file
Volume_Top_File.h -- Header for Volume_Top_File
Copyright (c) HR650X BIOS Decompilation Project
**/
#ifndef __VOLUME_TOP_FILE_H__
#define __VOLUME_TOP_FILE_H__
#include "../uefi_headers/Uefi.h"
//
// Function Prototypes
//
EFI_STATUS
EFIAPI
ModuleEntryPointThunk(
VOID
);
EFI_STATUS
EFIAPI
SecHandleSysCalls(
VOID
);
EFI_STATUS
EFIAPI
SecStartup(
VOID
);
EFI_STATUS
EFIAPI
SecCoreEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
InstallSecPpi(
VOID
);
EFI_STATUS
EFIAPI
FindPeiCore(
VOID
);
EFI_STATUS
EFIAPI
PeiCoreEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
SecBist(
VOID
);
EFI_STATUS
EFIAPI
SecTemporaryRamSupport(
VOID
);
EFI_STATUS
EFIAPI
PeiServiceLocatePpi(
VOID
);
EFI_STATUS
EFIAPI
SecInitializeBootMode(
VOID
);
EFI_STATUS
EFIAPI
SecInitializeFpu(
VOID
);
EFI_STATUS
EFIAPI
SecReadSecCoreData(
VOID
);
EFI_STATUS
EFIAPI
SecSetupGdt(
VOID
);
EFI_STATUS
EFIAPI
SecSetupExceptionHandlers(
VOID
);
EFI_STATUS
EFIAPI
SecExceptionDispatcher(
VOID
);
EFI_STATUS
EFIAPI
NullExceptionHandler(
VOID
);
EFI_STATUS
EFIAPI
NullFunction(
VOID
);
EFI_STATUS
EFIAPI
ExceptionHandler0(
VOID
);
EFI_STATUS
EFIAPI
ExceptionHandler1(
VOID
);
EFI_STATUS
EFIAPI
ExceptionHandler3(
VOID
);
EFI_STATUS
EFIAPI
ExceptionHandler4(
VOID
);
EFI_STATUS
EFIAPI
ExceptionHandler5(
VOID
);
EFI_STATUS
EFIAPI
ExceptionHandler6(
VOID
);
EFI_STATUS
EFIAPI
PeCoffGetEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
Assert(
VOID
);
EFI_STATUS
EFIAPI
SerialPortWrite(
VOID
);
EFI_STATUS
EFIAPI
SecWriteCr0(
VOID
);
EFI_STATUS
EFIAPI
SecWriteCr4(
VOID
);
EFI_STATUS
EFIAPI
SecEnableSse(
VOID
);
EFI_STATUS
EFIAPI
SecSwitchStack(
VOID
);
EFI_STATUS
EFIAPI
SecReadIdtBase(
VOID
);
EFI_STATUS
EFIAPI
SecInitIdtEntry(
VOID
);
EFI_STATUS
EFIAPI
WriteMsr(
VOID
);
EFI_STATUS
EFIAPI
LidtWrapper(
VOID
);
EFI_STATUS
EFIAPI
SidtWrapper(
VOID
);
EFI_STATUS
EFIAPI
IoWrite32(
VOID
);
EFI_STATUS
EFIAPI
IoRead16(
VOID
);
EFI_STATUS
EFIAPI
IoReadWrite8(
VOID
);
EFI_STATUS
EFIAPI
PciCfgReadWrite(
VOID
);
EFI_STATUS
EFIAPI
stub - handles call from _ModuleEntryPoint(
VOID
);
EFI_STATUS
EFIAPI
call handling placeholder(
VOID
);
EFI_STATUS
EFIAPI
boot mode from CMOS(
VOID
);
EFI_STATUS
EFIAPI
FPU(
VOID
);
EFI_STATUS
EFIAPI
default IDT entry template from .data section(
VOID
);
EFI_STATUS
EFIAPI
current IDTR(
VOID
);
EFI_STATUS
EFIAPI
how many IDT entries we need (max 32)(
VOID
);
EFI_STATUS
EFIAPI
IDT entries with exception gate type 0x8E(
VOID
);
EFI_STATUS
EFIAPI
segment selector(
VOID
);
EFI_STATUS
EFIAPI
SecCoreData structure(
VOID
);
EFI_STATUS
EFIAPI
of fields in SecCoreData(
VOID
);
EFI_STATUS
EFIAPI
PEI Core entry point(
VOID
);
EFI_STATUS
EFIAPI
}(
VOID
);
EFI_STATUS
EFIAPI
for PPI descriptors (NullStub returns 0 if none)(
VOID
);
EFI_STATUS
EFIAPI
PPIs - first descriptor at Dst (24 bytes)(
VOID
);
EFI_STATUS
EFIAPI
remaining descriptors from PEI Core(
VOID
);
EFI_STATUS
EFIAPI
PEI temporary RAM usage(
VOID
);
EFI_STATUS
EFIAPI
PPI descriptor(
VOID
);
EFI_STATUS
EFIAPI
flag(
VOID
);
EFI_STATUS
EFIAPI
through FFS files in the firmware volume(
VOID
);
EFI_STATUS
EFIAPI
extended FFS header(
VOID
);
EFI_STATUS
EFIAPI
} else {(
VOID
);
EFI_STATUS
EFIAPI
file type: PEIM (3) or FV_PEIM (4)(
VOID
);
EFI_STATUS
EFIAPI
sections within this PEIM file(
VOID
);
EFI_STATUS
EFIAPI
header(
VOID
);
EFI_STATUS
EFIAPI
section (16) or TE section (18)(
VOID
);
EFI_STATUS
EFIAPI
both PE32 and TE entry points(
VOID
);
EFI_STATUS
EFIAPI
PEI Core in FV(
VOID
);
EFI_STATUS
EFIAPI
the buffer and relocate PE32 image(
VOID
);
EFI_STATUS
EFIAPI
TE image(
VOID
);
EFI_STATUS
EFIAPI
entry point from PEI Core(
VOID
);
EFI_STATUS
EFIAPI
to locate primary BIST PPI(
VOID
);
EFI_STATUS
EFIAPI
Result = PeiServiceLocatePpi(PeiServicesTablePointer(
VOID
);
EFI_STATUS
EFIAPI
cache(
VOID
);
EFI_STATUS
EFIAPI
and disable MTRR_DEF_TYPE(
VOID
);
EFI_STATUS
EFIAPI
MTRR_PHYS_BASE_0 valid bit and set type(
VOID
);
EFI_STATUS
EFIAPI
MTRR_DEF_TYPE(
VOID
);
EFI_STATUS
EFIAPI
exception type and APIC ID(
VOID
);
EFI_STATUS
EFIAPI
data (for page faults etc)(
VOID
);
EFI_STATUS
EFIAPI
fault(
VOID
);
EFI_STATUS
EFIAPI
all CPU registers(
VOID
);
EFI_STATUS
EFIAPI
the current temporary RAM stack pointer(
VOID
);
EFI_STATUS
EFIAPI
PPI notification(
VOID
);
EFI_STATUS
EFIAPI
return -2147483634;(
VOID
);
EFI_STATUS
EFIAPI
// Wait for callback(
VOID
);
EFI_STATUS
EFIAPI
+ Base(
VOID
);
EFI_STATUS
EFIAPI
CMOS byte at index 0x6C(
VOID
);
EFI_STATUS
EFIAPI
index(
VOID
);
EFI_STATUS
EFIAPI
read(
VOID
);
EFI_STATUS
EFIAPI
boot mode byte(
VOID
);
EFI_STATUS
EFIAPI
boot mode value(
VOID
);
EFI_STATUS
EFIAPI
baud rate(
VOID
);
EFI_STATUS
EFIAPI
/ BaudRate(
VOID
);
EFI_STATUS
EFIAPI
serial port if one is detected(
VOID
);
EFI_STATUS
EFIAPI
set if divisor value changed or line control not 3(
VOID
);
EFI_STATUS
EFIAPI
for transmitter ready(
VOID
);
EFI_STATUS
EFIAPI
divisor latch and baud rate(
VOID
);
EFI_STATUS
EFIAPI
__outbyte(SerialPort + 2, 0); // FIFO off(
VOID
);
EFI_STATUS
EFIAPI
on(
VOID
);
EFI_STATUS
EFIAPI
FPU control word initialization(
VOID
);
EFI_STATUS
EFIAPI
with IOH (3 config entries)(
VOID
);
EFI_STATUS
EFIAPI
with PCH (2 config entries)(
VOID
);
EFI_STATUS
EFIAPI
GDT and exception handlers for 6 entries (18 bytes / 3)(
VOID
);
EFI_STATUS
EFIAPI
configuration mode(
VOID
);
EFI_STATUS
EFIAPI
GDT entry base (4 bytes)(
VOID
);
EFI_STATUS
EFIAPI
current limit+flags, set to 2 (32-bit)(
VOID
);
EFI_STATUS
EFIAPI
configuration(
VOID
);
EFI_STATUS
EFIAPI
back the 4-byte GDT value(
VOID
);
EFI_STATUS
EFIAPI
handler address (4 bytes at 0xF0-0xF3)(
VOID
);
EFI_STATUS
EFIAPI
gate type & segment (4 bytes at 0xF4-0xF7)(
VOID
);
EFI_STATUS
EFIAPI
gate type = interrupt gate (bit 1 of byte 5)(
VOID
);
EFI_STATUS
EFIAPI
segment selector = 0x08 (CS) at register FE(
VOID
);
EFI_STATUS
EFIAPI
write(
VOID
);
EFI_STATUS
EFIAPI
error configuration(
VOID
);
EFI_STATUS
EFIAPI
PCI configuration for error logging(
VOID
);
EFI_STATUS
EFIAPI
- return from exception(
VOID
);
EFI_STATUS
EFIAPI
entry point address within the relocated image(
VOID
);
EFI_STATUS
EFIAPI
Machine == 0x200 || // IA64(
VOID
);
EFI_STATUS
EFIAPI
?(
VOID
);
EFI_STATUS
EFIAPI
Machine == 0xAA64) // AARCH64(
VOID
);
EFI_STATUS
EFIAPI
return WordPtr;(
VOID
);
EFI_STATUS
EFIAPI
debug level from CMOS(
VOID
);
EFI_STATUS
EFIAPI
if (!DebugLevel)(
VOID
);
EFI_STATUS
EFIAPI
debug disabled(
VOID
);
EFI_STATUS
EFIAPI
and push to serial(
VOID
);
EFI_STATUS
EFIAPI
for transmitter ready (bit 6)(
VOID
);
EFI_STATUS
EFIAPI
for THR empty (bit 5)(
VOID
);
EFI_STATUS
EFIAPI
up to 16 bytes(
VOID
);
EFI_STATUS
EFIAPI
IIO stacks (0-3) and PCI segments.(
VOID
);
EFI_STATUS
EFIAPI
values via IoRead32/IoWrite32 to 0xF8080/0xF8082.(
VOID
);
EFI_STATUS
EFIAPI
existing config from 0xF8080, modify, write back(
VOID
);
EFI_STATUS
EFIAPI
mirror to MSRs 0xFDEF2770/0xFDEF2774(
VOID
);
EFI_STATUS
EFIAPI
HOB chain looking for matching type(
VOID
);
EFI_STATUS
EFIAPI
HOB with GUID header + data(
VOID
);
EFI_STATUS
EFIAPI
width, precision, padding, type conversion(
VOID
);
EFI_STATUS
EFIAPI
functions follow standard UEFI library implementations:(
VOID
);
EFI_STATUS
EFIAPI
Volume_Top_File.md for complete function list.(
VOID
);
#endif /* __VOLUME_TOP_FILE_H__ */