Watchdog Timer DXE driver for the Intel Purley PCH (South Cluster LBG). Programs the PCH WDT timer registers via IO ports, manages timer reload/start/stop before OS boot, hooks into BDS/ReadyToBoot and LegacyBoot event notifications to enable and disable the watchdog appropriately.
Key Functions: sub_CEC (ReloadAndStartTimer: program WDT counter and enable), sub_D94 (DisableTimer: clear WDT enable), sub_E38 (AllowKnownReset: set debug flag + clear SMI routing), sub_704 (TimerCallback: run at ReadyToBoot to reload WDT with BDS-determined timeout), sub_578 (Main registration: install timer event + notify callbacks), sub_C90 (resolve PCH WDT IO base address via MMIO PCI cycle decoding).
Protocols/Dependencies: EFI_DEBUG_PROTOCOL, PCD Protocol, DxeServicesTable (gDS), MmPci base protocol for PCH cycle decoding, DxeHobLib for EFI_RESOURCE_HOB, IO ports (TCOBASE+0x54 from PCH LPC IO decode registers +0x84), BaseIoLibIntrinsic (indword/outdword).
Platform: Intel Purley (Skylake-SP) / HR650X server, PurleySktPkg/SouthClusterLbg/Wdt/Dxe/WdtDxe