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AMI-Aptio-BIOS-Reversed / AmiCRBPkg / Chipset / SB / SBDXE / README.md
@Ajax Dong Ajax Dong 2 days ago 1 KB Full restructure

SBDXE

Index: 0081 (81)
Size: 19552 bytes (PE32+ body)
Phase: DXE (Driver eXecution Environment)
Subsystem: EFI_BOOT_SERVICE_DRIVER (0x0B)

Overview

South Bridge DXE Driver. Provides South Bridge initialization for the Purley/Lewisburg PCH (Platform Controller Hub). Installs driver binding and protocol interfaces, manages XHCI USB port-per-port disable based on HII configuration, configures PCIe segment/bus routing via PCIE_SEG_BUS_TABLE, integrates with S3 Boot Script save/restore and SMM LockBox, and detects PCH stepping and SKU for runtime policy decisions.

Key Functions

  • SbDxeEntryPoint -- Module entry point; initializes South Bridge driver context
  • SbDxeUsbXhciConfig -- Configures XHCI USB port disable/enable based on HII settings
  • SbDxePcieBusRouting -- Programs PCIe segment and bus number routing tables
  • SbDxePchSteppingDetect -- Detects PCH stepping and SKU for policy decisions
  • SbDxeS3BootScriptSave -- Saves South Bridge register state to boot script for S3
  • SbDxeSmmLockBoxConfigure -- Coordinates with SMM LockBox for secure register preservation
  • SbDxeHobProcess -- Processes HOBs from earlier PEIM phases for SB configuration data

Protocols / Dependencies

  • PCI_IO_PROTOCOL -- PCI configuration space access
  • SMM_COMMUNICATION_PROTOCOL -- Communication with SMM for LockBox operations
  • PI_PCD_PROTOCOL -- PCD database access for platform configuration
  • DXE Services Table -- Memory attribute management
  • HOB Library -- Access to pre-memory HOB data
  • PCI Express Library -- MMIO-based PCI configuration access

Platform

Purley platform with Lewisburg PCH, HR650X BIOS. Copyright (c) 2017-2019, American Megatrends Inc. (AMI) and Intel Corporation. x86-64 architecture.