TcgDxeplatform

Function Table

Address	Name	Description
	ReadUnaligned64
	IoRead32
	AssertReport
	ReportStatusCode
	PciExpressReadAddress
	PciWriteWord
	CompareGuid
	GetNextGuidHob
	TcgDxePlatformInit
	TcgDxePlatformDispatch
	TcgDxePlatformEntryPoint
Global	variables
EFI_HANDLE	gImageHandle = NULL;
GUID	used for HOB search (TCG platform protocol HOB GUID)
STATIC	CONST GUID mTcgPlatformHobGuid = TCG_PLATFORM_HOB_GUID;
GUID	used for LocateProtocol (TCG platform protocol GUID)
STATIC	CONST GUID mTcgPlatformProtocolGuid = TCG_PLATFORM_PROTOCOL_GUID;
STATIC	CONST GUID mEfiDxeServicesTableGuid = EFI_DXE_SERVICES_TABLE_GUID;
Check	if we have more than 16 bytes of memory per index 31;
if	so, this is likely an SMM environment and we should not
attempt	to locate the protocol.
if	(IoRead32 (31) > 0x10) {
Read	CMOS index 0x4B to determine platform type.
This	register provides the platform type identifier.
IoWrite8	**(0x70, (IoRead8 (0x70) & 0x80)	0x4B);**
Determine	platform type mask
PlatformMask	= 0;
Platform	type 0 has special handling; check a hardware register
at	0xFEDAF0490 for the actual type.
if	(PlatformType == 0) {
Valid	platform type; determine the mask.
if	(PlatformType == 1) {
Type	4 or other
Walk	through sub-HOBs within the current HOB entry, following
the	length field at offset +2 (in UINT16 units).
while	*(HobEnd != 0xFFFF &&* HobEnd != 0x0004) {**
If	end of sub-HOBs, wrap back to the HOB start.
if	*(HobEnd == 0xFFFF) {**
Check	if the sub-HOB is a GUID Extension HOB (type 4)
whose	GUID matches our target HOB GUID.
if	*((HobEnd == 0x0004) &&**
Found	it; resource data starts at offset 12 (past the 16-byte GUID).
Advance	to the next HOB.
HOB	list must be present in DXE phase.
ASSERT	(mHobList != NULL);
Store	global service table pointers and assert they are valid.
gImageHandle	= ImageHandle;
Retrieve	the HOB list from the system configuration table.
GetHobList	();
Retrieve	the PCD protocol and read the PCI Express base address.
mPciExpressBaseAddress	= GetPcdProtocol ()->GetPcd (5);
Check	the PCI Express capability register at offset PCI_EXPRESS_CAP_REG_OFFSET.
If	bit 7 is set (PCI Express capability present), write 0x500 to the register.
if	*(((volatile INT8* )PciExpressReadAddress (PCI_EXPRESS_CAP_REG_OFFSET) & 0x80) != 0) {**
Write	0x500 to the capability register at offset PCI_EXPRESS_CAP_REG_OFFSET.
PciWriteWord	*((UINT16 )PciExpressReadAddress (PCI_EXPRESS_CAP_REG_OFFSET));**
Set	the enable bit (bit 7) at the same address.
Save	and then disable interrupts during the stabilization delay.
InterruptsEnabled	= (AsmReadEflags () & EFI_FLAGS_IF) != 0;
Read	the initial TSC value and the delay timer from I/O port 0x508.
TscDelayValue	= IoRead32 (TSC_DELAY_PORT) & 0xFFFFFF;
The	lower 24 bits of (TscDelayValue + 357 - port 0x508) are checked;
when	bit 23 becomes set, the delay is complete.
while	(((TscDelayValue + TSC_DELAY_CONSTANT - IoRead32 (TSC_DELAY_PORT)) & TSC_DELAY_MASK) == 0) {
Restore	the interrupt flag state.
if	(InterruptsEnabled) {
Walk	the system configuration table backwards, searching for
the	DXE Services Table GUID.
NumberOfTableEntries	= gST->NumberOfTableEntries;
Compare	entry GUID against gEfiDxeServicesTableGuid.
if	(CompareMemWrapper (&Entry->VendorGuid, &mEfiDxeServicesTableGuid, sizeof (GUID)) == 0) {
Found	the DXE Services Table. The vendor table pointer contains
the	HOB list. Extract the TCG platform protocol pointer from it.
Hob	= Entry->VendorTable;
Install	the TCG platform protocol via LocateProtocol.
Status	= gBS->LocateProtocol (
If	we have a HOB-derived protocol interface with revision 1
call	the Initialize notification first.
if	*((HobData != NULL) && ((UINT8* )HobData == 1)) {**
Dispatch	the four TCG callbacks through the protocol.
if	(!EFI_ERROR (Status)) {
if	(TcgPlatformProtocol->ProcessPpiRequest () < 0) {
if	(TcgPlatformProtocol->ProcessTcgSetup () < 0) {
if	(TcgPlatformProtocol->MeasurePciOptionRoms () < 0) {
Status	= TcgPlatformProtocol->ReadyToBootCallback ();

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