int __thiscall VgaModeProgramLarge(int this)
{
  int v2; // edi
  int v3; // ecx
  int v4; // ecx
  int v5; // ecx
  int v6; // ecx
  int v7; // ecx
  int v8; // ecx
  int v9; // ecx
  int v10; // ecx
  int v11; // ecx
  int v12; // ecx
  int v13; // ecx
  int v14; // ecx
  int v15; // ecx
  int v16; // ecx
  int v17; // ecx
  int v18; // ecx
  int v19; // ecx
  int v20; // ecx
  int v21; // ecx
  int v22; // ecx
  int v23; // ecx
  int v24; // ecx
  int v25; // ecx
  int v26; // ecx
  int v27; // eax
  int v28; // edx
  int v29; // ecx
  int v30; // ecx
  int v31; // ecx
  unsigned int v32; // esi
  int v33; // ecx
  int v34; // ecx
  int v35; // ecx
  int v36; // eax
  int v37; // edx
  int v38; // ecx
  int v39; // ecx
  unsigned __int16 v40; // ax
  int v41; // ecx
  int v42; // ecx
  int v43; // ecx
  int v44; // ecx
  int v45; // ecx
  int v46; // ecx
  int v47; // ecx
  int v48; // ecx
  int v49; // ecx
  int v50; // ecx
  int v51; // ecx
  int v52; // ecx
  int v53; // ecx
  unsigned int v54; // esi
  int v55; // edx
  int v56; // ecx
  int v57; // ecx
  int v58; // ecx
  int v59; // ecx
  int v60; // ecx
  int v61; // ecx
  int v62; // ecx
  int v63; // eax
  int v64; // edx
  int v65; // ecx
  int v66; // ecx
  int v67; // ecx
  int v68; // ecx
  int v69; // edx
  int v70; // ecx
  unsigned int v72; // [esp-4h] [ebp-18h]

  v2 = *(_DWORD *)this;
  PciRegWrite(*(_DWORD *)this, 510525440, -60816631);
  PciRegWrite(v3, 510525540, 0);
  PciRegWrite(v4, 510525492, 0);
  PciRegWrite(v5, 510525464, 256);
  PciRegWrite(v6, 510525476, 0);
  MicroSecondDelay(10);
  PciRegWrite(v2, 510525540, *(_DWORD *)(this + 40));
  PciRegWrite(v7, 510525544, *(_DWORD *)(this + 44));
  MicroSecondDelay(10);
  PciRegWrite(v2, 510525540, *(_DWORD *)(this + 40) | 0xC0000);
  MicroSecondDelay(10);
  PciRegWrite(v2, 510525444, 1329);
  PciRegWrite(v8, 510525448, 9438223);
  PciRegWrite(v9, 510525456, *(_DWORD *)(this + 56));
  PciRegWrite(v10, 510525460, *(_DWORD *)(this + 60));
  PciRegWrite(v11, 510525472, *(_DWORD *)(this + 68));
  PciRegWrite(v12, 510525568, 0);
  PciRegWrite(v13, 510525572, 0xFFFFFF);
  PciRegWrite(v14, 510525576, *(_DWORD *)(this + 80));
  PciRegWrite(v15, 510525464, 1073783152);
  PciRegWrite(v16, 510525464, 368);
  PciRegWrite(v17, 510525496, 0);
  PciRegWrite(v18, 510525504, -12303292);
  PciRegWrite(v19, 510525508, 572662306);
  PciRegWrite(v20, 510525512, 572662306);
  PciRegWrite(v21, 510525516, 2);
  PciRegWrite(v22, 510525520, 0x80000000);
  PciRegWrite(v23, 510525520, 0);
  PciRegWrite(v24, 510525524, 0);
  PciRegWrite(v25, 510525536, *(_DWORD *)(this + 72));
  v27 = PciRegRead(v26, 510525444);
  PciRegWrite(v29, v28, v27 | 0x400);
  v32 = (unsigned int)PciRegRead(v30, 510525444) >> 10;
  if ( v32 )
    PciRegWrite(v2, 510525548, (*(_DWORD *)(this + 76) << 8) | (*(_DWORD *)(this + 76) - 17));
  else
    PciRegWrite(v31, 510525548, *(_DWORD *)(this + 76));
  PciRegWrite(v2, 510525552, 0);
  PciRegWrite(v33, 510525556, 0);
  PciRegWrite(v34, 510525560, 0);
  PciRegWrite(v35, 510525564, 0);
  if ( v32 )
    VgaModeSetSync((int *)this);
  else
    VgaModeConfigPll((int *)this, 0);
  v36 = PciRegRead(v2, 510525464);
  PciRegWrite(v38, v37, v36 | 0x40);
  v40 = PciRegRead(v39, 510525544);
  PciRegWrite(v41, 510525728, v40);
  PciRegWrite(v42, 510525492, 1);
  PciRegWrite(v43, 510525452, 64);
  MicroSecondDelay(50);
  PciRegWrite(v2, 510525484, *(_DWORD *)(this + 48) | 0x100);
  PciRegWrite(v44, 510525488, *(_DWORD *)(this + 52));
  PciRegWrite(v45, 510525480, 5);
  PciRegWrite(v46, 510525480, 7);
  PciRegWrite(v47, 510525480, 3);
  PciRegWrite(v48, 510525480, 1);
  PciRegWrite(v49, 510525484, *(_DWORD *)(this + 48));
  PciRegWrite(v50, 510525452, 23560);
  PciRegWrite(v51, 510525480, 1);
  PciRegWrite(v52, 510525452, 8193);
  v53 = *(_DWORD *)(this + 24) != 0 ? 0x300 : 0;
  if ( *(_DWORD *)(this + 28) )
    v53 |= (*(_DWORD *)(this + 60) & 0x60000 | 0x10000u) >> 3;
  PciRegWrite(v2, 510525492, v53 | 3);
  VgaModeInit((int *)this);
  v54 = PciRegRead(v2, 510525444) & 0xFFFFFFFC;
  PciRegWrite(v56, v55, v54 | 3);
  PciRegWrite(v57, 1343225856, 1094861636);
  PciRegWrite(v58, 1209008128, 623257384);
  PciRegWrite(v59, 1074790400, 421141276);
  if ( PciRegRead(v60, 1343225856) == 1094861636 )
  {
    PciRegWrite(v61, 510525444, v54 | 3);
    v63 = PciRegRead(v62, 510525460);
    v65 = *(unsigned __int8 *)(this + 67);
  }
  else
  {
    if ( PciRegRead(v61, 1209008128) != 623257384 )
    {
      PciRegWrite(v66, 510525444, v54 | 1);
      v72 = PciRegRead(v68, 510525460) & 0xFFFFFF00 | *(unsigned __int8 *)(this + 65);
      PciRegWrite(v70, v69, v72);
      return PciRegWrite(v2, 510525728, *(_DWORD *)(this + 84));
    }
    PciRegWrite(v66, 510525444, v54 | 2);
    v63 = PciRegRead(v67, 510525460);
    v65 = *(unsigned __int8 *)(this + 66);
  }
  PciRegWrite(v2, v64, v63 & 0xFFFFFF00 | v65);
  return PciRegWrite(v2, 510525728, *(_DWORD *)(this + 84));
}