HeciInit

Function Table

Address	Name	Description
	AsmReadIdtr
	HeciGetPcd32
	HeciGetPcdPtr
	HeciCompareGuid
	IoRead16
	IoWrite16
	IoRead32
	MemoryRead16
	HeciReadVendorId
	PciExpressRead8
	HeciPciRead32
	HeciMicrosecondDelay
	HeciGetMbar
	HeciGetMbarEx
	HeciReset
	HeciWaitMeReady
	HeciInitialize
	HeciIsBusy
	HeciReadMsg
	HeciReceive
	HeciWriteCircularBuf
	HeciSendCore
	HeciSend
	HeciSendwAck
	HeciGetMeStatus
	HeciGetMeMode
	Heci2GetNmStatus
	HeciIsDwrDetected
	HeciGetMeFs1FromHob
	HeciGetOnBoardMeType
	HeciLogMeType
	PchAcpiBaseGet
	PchPwrmBaseGet
	Heci2GetMbar
	Heci2Initialize
	HeciIsSimicsMode
	HeciReadBootMode
	HeciWriteBootMode
	HeciInitBootMode
	HeciPciRead8
	HeciPciCfgRead
	HeciPeimEntryPoint
Global	data used by the HECI PEIM
extern	UINT8 mImageGuid[]; // GUID at 0xFFD9FA54
Boot	mode flag storage at 0xFFD9FA64
PciExpressLib	base address
Memory	and string utility functions
Overlapping	copy (dest after src): copy backwards
CopyMem	*((UINT8 )Source + Count - 1**
PEI	Services table access via IDT
PCD	(Platform Configuration Database) access
HOB	(Hand-Off Block) functions
EFI_HOB_TYPE_GUID_EXTENSION	if (Hob == NULL) {
PCI	Express config read
Microsecond	delay via MBAR polling
Convert	microseconds to ticks at 3.579545 MHz
ticks	*= 3579545 us / 1000000**
Ticks	*= (UINT64)3579545 Microseconds;**
HECI	get MBAR (HECI-1)
Enable	memory space and bus master in PCI config if not already set
if	*((((UINT8* )HeciPciRead32 (0, HECI_PCI_CMD_REG_OFFSET) + 4) & 6) != 6) {**
HECI	reset
Check	ME state - don't reset in certain error states
MeFs1	*= ((UINT32* )HeciPciRead32 (0, HECI_PCI_ME_FS_OFFSET) + 64);**
Recovery	**(HIWORD(MeFs1) & 0x0F) == 2		// SPS w/Debug**
Disabled	DEBUG ((EFI_D_ERROR, "[HECI] Wrong ME state, can't execute reset ME FS 0x%x\n", MeFs1));
Set	**host reset bits (HRA	ER) if not already set**
if	((HostCsr & HECI_CSR_ER) == 0) {
Wait	for host-side reset to complete (RDY cleared)
Timeout	= 25000;
Wait	for ME-side reset ready (RDY set)
HECI	wait for ME ready
if	((Csr & 8) != 0) {
if	((Csr & 0x10) != 0) {
Check	if device is present
VendorId	*= MemoryRead16 ((UINT16 )HeciPciRead32 (0, 0));**
Get	MBAR
Mbar	= HeciGetMbarEx (0);
Set	HIDM boot mode (Boot Type = 0, Boot Target = 0, Mode = SCI)
Enable	bus master + memory space
Check	ME state
Recovery	mode - initialization will be handled later
return	HeciWaitMeReady ();
Wait	for ME interface ready
if	(HeciWaitMeReady ()) {
Initialize	host CSR: set IG + RP + HRA
HostCsr	*= (volatile UINT32* )(Mbar + 4);**
HECI	check interface busy
HECI	message read from circular buffer
Check	if buffer is empty (write pointer == read pointer)
if	((UINT8)HIWORD (Regs->MeData) == BYTE1 (Regs->MeData)) {
Check	for empty buffer in blocking case
if	((UINT8)BYTE2 (Regs->MeData) == BYTE1 (Regs->MeData) && !MsgHeader) {
Parse	message header
i	= 1000;
Wait	for enough slots to be available
for	(Timeout = 1000; SlotCount > (UINT8)(HIWORD (Regs->MeData) - BYTE1 (Regs->MeData)); ) {
Copy	the message data
for	(i = 0; i < SlotCount; i++) {
Set	HRA
HECI	message receive
HECI	message send core
Write	the message header and data
Check	if ME-side ready for data
if	((Regs->MeData & 8) != 0) {
Not	ready - reset and retry
if	(HeciReset (0)) {
HECI	send message
HECI	send with acknowledgement
Check	if circular buffer is empty (write ptr == read ptr)
if	*((UINT8)BYTE2 ((volatile UINT32* )(Mbar + 12)) == BYTE1 ((volatile UINT32 )(Mbar + 12))) {**
ME	status / mode detection
Normal	*MeStatus = ME_STATUS_NORMAL;
SECBOOT	*MeStatus = ME_STATUS_SECBOOT;
M0	if ((MeFs1 & 0xF000) == 0) {
DFX	*MeStatus = ME_STATUS_DFX;
Disabled	*MeStatus = ME_STATUS_DISABLED;
Error	*MeStatus = ME_STATUS_ERROR;
DWR	(Disable Warm Reset) detection
ME	type detection
HOB	not found or Group[0].FunNumber == 0
if	(FwHob != NULL) {
Check	DWR first
if	(HeciIsDwrDetected ()) {
Read	MEFS1 from the HECI device config
MeFs1	*= ((UINT32* )HeciPciRead32 (22, 0) + 64);**
Not	available - fall back to HOB
MeFs1	= HeciGetMeFs1FromHob ();
Decode	ME type
if	((MeFs1 & 0x0F) != 0x0F) {
Recovery	mode
return	ME_TYPE_DISABLED;
Unknown	type
DEBUG	((EFI_D_ERROR, "HECI: ME type not recognized (MEFS1: 0x%08X)\n", MeFs1));
PCH	ACPI base get
Configure	HIDM
Memory	space enable
BM	+ Mem
Initialize	host CSR
SIMICS	mode detection
Read	RTC index 0x4A to check for SIMICS
RtcReg	= __inbyte (0x70);
Alternative	check through memory-based detection
SimicsVal	= ((volatile UINT8 )0xFDAF0490 & 2)	1;**
Boot	Mode read/write
PCI	Express config read (byte)
Module	Entry Point
Initialize	boot mode tracking
HeciInitBootMode	();
Check	for DWR (Disable Warm Reset)
Determine	ME type for the current platform
MeType	= HeciGetOnBoardMeType ();
Initialize	HECI-1 interface
HeciPciCfgRead	(0, HECI_PCI_CMD_REG_OFFSET) + 20 = 0;

Generated by HR650X BIOS Decompilation Project