FpgaErrorHandler

Index: 0220 | Size: 36,864 bytes (148,352 body) | Phase: SMM

Overview

SMM driver that handles FPGA (Field Programmable Gate Array) error status monitoring and correction for the Intel Purley platform. Monitors FPGA error registers via MMIO, performs error acknowledgment, and triggers warm reset via I/O port 0xCF9 when critical FPGA errors are detected. Integrates with the MpSyncData library for multi-processor synchronization. Supports up to 4 sockets with per-socket FPGA error register access.

Key Functions

• ModuleEntryPoint -- SMM entry point: initializes error handler, registers 6 FPGA callbacks
• sub_EAC -- Main FPGA error handler setup: locates MmPciBase, FPGA callback, MpSyncData protocols
• sub_DFC -- Error status collection: reads FPGA error registers per socket via MMIO
• sub_D48 -- Error polling: checks FPGA error pending bits, logs via sub_A30
• sub_CB4 -- Fatal error handler: writes GPIO, triggers warm reset via 0xCF9
• sub_B38/sub_B48/sub_BF0/sub_C90 -- FPGA callback array: presence check, clear, buffer clear, status query

Protocols/Dependencies

• MmPciBase Protocol, FPGA Callback Registration Protocol
• MpSyncData Protocol, PciRootBridge Protocol, PCD Protocol
• GPIO Private Library, PCH Info Library

Platform

Intel Purley (Skylake-SP Xeon), HR650X
Source: PurleyPlatPkg/Ras/Smm/ErrHandling/FpgaErrorHandler/