TxtPei

Overview

TxtPei implements Intel Trusted Execution Technology (TXT, formerly LaGrande Technology) initialization during the PEI phase. It configures cache-as-RAM (CAR), locks MSRs, launches the BIOS ACM (Authenticated Code Module), sets up MTRRs, manages page tables for SINIT, and coordinates the measured launch environment (MLE).

This module is critical for establishing a hardware root of trust at boot. It interacts with the TXT hardware registers, SINIT AC modules, and chipset PSF (Private Configuration Space) to prepare the platform for a measured launch before the DXE phase begins.

Key Functions

• TxtPeiInit -- Main TXT initialization routine.
• LtPeiLibLaunchBiosAcm -- Launches the BIOS ACM for SINIT verification.
• LtPeiLibInitialize -- Initializes the TXT library and device memory.
• CacheRegionSetup / CachePagingSetup -- Configures MTRRs and page tables for pre-memory execution.
• BiosAcmInvoke -- Invokes the BIOS Authenticated Code Module.
• LtPeiLockMsr / LtPeiLockConfig -- Locks sensitive MSRs and configuration registers.
• LtPeiGetTxtVersion -- Reads the TXT hardware version capabilities.
• DwrCheck -- Verifies DWR (Debug Warranty Register) status.

Dependencies

• TXT hardware registers (TXTCR, TXTDPR)
• SINIT AC module
• PEI services (PPI lookup, HOB creation)
• MSR and PCI/PSF configuration access
• MTRR programming

Platform

Intel Purley platform with TXT support, 32-bit PEI phase, requires compatible SINIT ACM.